Supply pin rearrangement for an I.C.

Claim 2

An integrated circuit device comprising: (a) an integrated circuit, (b) a plurality of external connection pins extending from the device, (c) a plurality of conductive connections coupling said integrated circuit respectively to said connection pins, (d) wherein among said connection pins there are at least a first supply pin and second supply pin, (e) at least one output signal pin, (f) at least one pin not being a supply pin or an output pin, (g) said first supply pin and second supply pin being next to each other and an output signal pin being next to one of said supply pins, the first supply pin being for connection to a first supply voltage and the second supply pin being for connection to a second supply voltage different from the first supply voltage, and (h) wherein an aggregated electrical path length of each and every supply pin and its respective conductive connection is equal to or shorter than an aggregated electrical path length of any of the connection pins not being a supply pin and its respective conductive connection.

Claim 3

The device of claim 1, wherein an aggregated electrical path length of each and every output pin and its respective conductive connection is equal to or shorter than an aggregated electrical path length of any of the connection pins not being a supply pin or an output pin and its respective conductive connection.

Claim 4

The device of claim 1, wherein among said connection pins there are at least two output signal pins, one of said output signal pins being next to said first supply pin and the other of said output signal pins being next to said second supply pin.

Claim 5

The device of claim 2, wherein among said connection pins there are at least two output signal pins, one of said output signal pins being next to said first supply pin and the other of said output signal pins being next to said second supply pin.

Claim 6

A circuit element comprising: (a) an integrated circuit on a semiconductor substrate having bonding pads for connection to connection pins via conductive connections, (b) there being among said bonding pads a plurality of supply bonding pads including one or more pairs of adjacent supply bonding pads, each pair for receiving a supply voltage difference, (c) one or more output signal bonding pads each for providing a respective output signal from said circuit, (d) one or more other bonding pads, each of said other bonding pads being neither a supply bonding pad nor an output bonding pad, and (e) at least one of said output bonding pads being adjacent one of said supply bonding pads.

Claim 7

A circuit element comprising: (a) an integrated circuit on a semiconductor substrate having bonding pads for connection to connection pins via conductive connections, (b) there being among said bonding pads a plurality of supply bonding pads including one or more pairs of adjacent supply bonding pads, each pair for receiving a supply voltage difference, (c) one or more output signal bonding pads each for providing a respective output signal from said circuit, (d) one or more other bonding pads, each of said other bonding pads being neither a supply bonding pad nor an output bonding pad, and (e) at least one of said output bonding pads being adjacent one of said supply bonding pads.

Claim 8

The circuit element of claim 5, wherein each output bonding pad is adjacent a supply bonding pad or another of said output bonding pads.

Claim 9

The circuit element of claim 5, wherein one of said supply bonding pads to which one of said output bonding pads is adjacent is one supply bonding pad of one pair, the other supply bonding pad of said one pair is adjacent another of said output bonding pads.

Claim 10

The circuit element of claim 6, wherein one of said supply bonding pads to which one of said output bonding pads is adjacent is one supply bonding pad of one pair, the other supply bonding pad of said one pair is adjacent another of said output bonding pads.

Claim 11

An integrated circuit module, comprising: (a) a first plurality of sequences of connection pins, (b) an integrated circuit chip having a second plurality of series of bonding pads, in one-to-one associative relationship with said connection pins, a respective interconnection between each said bonding pad and the associated connection pin comprising a respective bonding wire; (c) among said connection pins there being one or more groups of pins consisting of a pair of adjacent supply pins and an output signal pin adjacent one of said pair of supply pins, (d) said pair of adjacent supply pins comprising a first supply pin for receiving a first supply voltage and a second supply pin for receiving a second supply voltage different from the first supply voltage, (e) wherein every of said groups of pins is substantially centrally disposed in an associated sequence, and is interconnected by a respective group of bonding wires to an associated group of adjacent bonding pads that is likewise substantially centrally disposed in an associated series, (f) said associated sequence and said associated series being located alongside each other.

Claim 12

An integrated circuit module, comprising: (a) a first plurality of sequences of connection pins, (b) an integrated circuit chip having a second plurality of series of bonding pads, in one-to-one associative relationship with said connection pins, a respective interconnection between each said bonding pad and the associated connection pin comprising a respective bonding wire; (c) among said connection pins there being one or more groups of pins consisting of a pair of adjacent supply pins and an output signal pin adjacent one of said pair of supply pins, (d) said pair of adjacent supply pins comprising a first supply pin for receiving a first supply voltage and a second supply pin for receiving a second supply voltage different from the first supply voltage, (e) wherein every of said groups of pins is substantially centrally disposed in an associated sequence, and is interconnected by a respective group of bonding wires to an associated group of adjacent bonding pads that is likewise substantially centrally disposed in an associated series, (f) said associated sequence and said associated series being located alongside each other.

Claim 13

An integrated circuit module, comprising: (a) a first plurality of sequences of connection pins, (b) an integrated circuit chip having a second plurality of series of bonding pads, in one-to-one associative relationship with said connection pins, a respective interconnection between each said bonding pad and the associated connection pin comprising a respective bonding wire, (c) among said connection pins there being one or more groups of pins consisting of a pair of adjacent supply pins and and a pair of output signal pins adjacent different ones of said pair of supply pins, (d) said pair of adjacent supply pins comprising a first supply pin for receiving a first supply voltage and a second supply pin for receiving a second supply voltage different from the first supply voltage, (e) wherein every of said groups of pins is substantially centrally disposed in an associated sequence, and is interconnected by a respective group of bonding wires to an associated group of adjacent bonding pads that is likewise substantially centrally disposed in an associated series, (f) said associated sequence and said associated series being located alongside each other.

Claim 14

An integrated circuit module, comprising: (a) a first plurality of sequences of connection pins, (b) an integrated circuit chip having a second plurality of series of bonding pads, in one-to-one associative relationship with said connection pins, a respective interconnection between each said bonding pad and the associated connection pin comprising a respective bonding wire, (c) among said connection pins there being one or more groups of pins consisting of a pair of adjacent supply pins and and a pair of output signal pins adjacent different ones of said pair of supply pins, (d) said pair of adjacent supply pins comprising a first supply pin for receiving a first supply voltage and a second supply pin for receiving a second supply voltage different from the first supply voltage, (e) wherein every of said groups of pins is substantially centrally disposed in an associated sequence, and is interconnected by a respective group of bonding wires to an associated group of adjacent bonding pads that is likewise substantially centrally disposed in an associated series, (f) said associated sequence and said associated series being located alongside each other.

Claim 15

The device of claim 3 wherein each particular output pin is located nearer to the supply pin closest to the particular output pin than any other pin not being a supply pin nor output pin.

Claim 16

The device of claim 1, wherein the device further comprises at least one data input pin for receiving a data input signal and at least one control pin for receiving a control signal for controlling an operation by the circuit on the data input signal, and wherein each control pin is located between at least one output signal pin and a data input pin.

Claim 17

The device of claim 1 wherein the first supply pin and the second supply pin are disposed in a first ordered arrangement, the device further comprising a third supply pin and a fourth supply pin for receiving the first supply voltage and the second supply voltage respectively, and wherein said third and fourth supply pins are disposed in a second ordered arrangement that is located rotationally symmetrical with respect to the first ordered arrangement in a plane substantially through the first and second ordered arrangements.

Claim 18

The device of claim 12 comprising a memory circuit.

Claim 19

The circuit element of claim 5 wherein the element further comprises at least one data input pad for receiving a data input signal and at least one control pad for receiving a control signal for controlling an operation by the circuit on the data input signal and wherein the control pad is located between the output pad and the data input pad.

Claim 20

The circuit element of claim 5 wherein a first pair of supply pads are disposed in a first ordered arrangement, the device further comprising a second pair of supply pads for receiving the same voltage difference as the first pair, and wherein the second pair of supply pads are disposed in a second ordered arrangement that is located rotationally symmetrical with respect to the first ordered arrangement in a plane substantially through the first and second ordered arrangements.

Claim 21

The circuit element of claim 15 comprising a memory circuit.

Claim 22

An integrated circuit device comprising: (a) an integrated circuit element, (b) at least a first sequence of external connection pins connected to the element and extending from the device, said connection pins including at least a first supply pin and second supply pin for receiving a supply voltage difference, at least a first output signal pin and a second output signal pin each for providing respective output signals, at least a first data input pin and a second data input pin each for receiving respective data input signals, and at least a first control pin and a second control pin each for receiving a respective control signal for controlling an operation by the circuit on the data input signals, (c) said sequence comprising the first supply pin located next to the second supply pin, the supply pins being located between the first output signal pin and the second output signal pin, the output signal pins being located between the first control pin and the second control pin, and the control pins being located between the first data input pin and the second data input pin.

Claim 23

An integrated circuit device comprising: (a) an integrated circuit element, (b) at least a first sequence of external connection pins connected to the element and extending from the device, said connection pins including at least a first supply pin and second supply pin for receiving a supply voltage difference, at least a first output signal pin and a second output signal pin each for providing respective output signals, at least a first data input pin and a second data input pin each for receiving respective data input signals, and at least a first control pin and a second control pin each for receiving a respective control signal for controlling an operation by the circuit on the data input signals, (c) said sequence comprising the first supply pin located next to the second supply pin, the supply pins being located between the first output signal pin and the second output signal pin, the output signal pins being located between the first control pin and the second control pin, and the control pins being located between the first data input pin and the second data input pin.

Claim 24

The device of claim 18 comprising a second sequence of connection pins same as the first wherein the second sequence of pins are located rotationally symmetrical with respect to the first sequence of pins in a plane substantially through the first and second sequences.

Claim 25

A circuit element comprising: (a) an integrated circuit on a semiconductor substrate having at least one sequence of bonding pads, (b) said bonding pads including at least a first supply pad and second supply pad for receiving a supply voltage difference, at least a first output signal pad and a second output signal pad each for providing respective output signals, at least a first data input pad and a second data input pad each for receiving respective data input signals, and at least a first control pad and a second control pad each for receiving a respective control signal for controlling an operation by the circuit on the data input signals, (c) said sequence comprising the first supply pad located next to the second supply pad, the supply pads being located between the first output signal pad and the second output signal pad, the output signal pads being located between the first control pad and the second control pad, and the control pads being located between the first data input pad and the second data input pad.

Claim 26

A circuit element comprising: (a) an integrated circuit on a semiconductor substrate having at least one sequence of bonding pads, (b) said bonding pads including at least a first supply pad and second supply pad for receiving a supply voltage difference, at least a first output signal pad and a second output signal pad each for providing respective output signals, at least a first data input pad and a second data input pad each for receiving respective data input signals, and at least a first control pad and a second control pad each for receiving a respective control signal for controlling an operation by the circuit on the data input signals, (c) said sequence comprising the first supply pad located next to the second supply pad, the supply pads being located between the first output signal pad and the second output signal pad, the output signal pads being located between the first control pad and the second control pad, and the control pads being located between the first data input pad and the second data input pad.

Claim 27

The circuit element of claim 20 comprising a second sequence of bonding pads same as the first wherein the second sequence of pads are located rotationally symmetrical with respect to the first sequence of pads in a plane substantially through the first and second sequences.

Claim 28

An integrated circuit device comprising: (a) an integrated circuit; (b) a plurality of external connection pins extending form the device, (c) a plurality of conductive connections coupling said integrated circuit respectively to said connection pins, (d) wherein among said connection pins there are at least a first supply pin and second supply pin, (e) at least one output signal pin, (f) at least one pin not being a supply pin or an output pin, (g) said first supply pin and second supply pin being next to each other and an output signal pin being next to one of said supply pins, the first supply pin being for connection to a first supply voltage and the second supply pin being for connection to a second supply voltage different from the first supply voltage, and (h) wherein an aggregated electrical path length of at least one supply pin and its respective conductive connection is equal to or shorter than an aggregated electrical path length of any of the connection pins not being a supply pin and its respective conductive connection.

Claim 29

An integrated circuit device comprising: (a) an integrated circuit; (b) a plurality of external connection pins extending form the device, (c) a plurality of conductive connections coupling said integrated circuit respectively to said connection pins, (d) wherein among said connection pins there are at least a first supply pin and second supply pin, (e) at least one output signal pin, (f) at least one pin not being a supply pin or an output pin, (g) said first supply pin and second supply pin being next to each other and an output signal pin being next to one of said supply pins, the first supply pin being for connection to a first supply voltage and the second supply pin being for connection to a second supply voltage different from the first supply voltage, and (h) wherein an aggregated electrical path length of at least one supply pin and its respective conductive connection is equal to or shorter than an aggregated electrical path length of any of the connection pins not being a supply pin and its respective conductive connection.