Method of making memory devices utilizing one-sided ozone teos spacers

Claim 1

A process to fabricate a one time programmable structure on a starting substrate of an integrated circuit comprising: a) forming an isolative dielectric layer superjacent said substrate; b) placing a first conductive material superjacent said isolative dielectric layer; c) forming a first dielectric layer superjacent said first conductive material; d) patterning said first conductive material and said first dielectric layer thereby forming first conductive lines spaced apart in parallel rows, said conductive lines having first and second sides; forming a second dielectric layer superjacent and coextensive said first conductive lines and exposed portions of said isolative dielectric layer; f) patterning said second dielectric layer thereby forming a thick dielectric spacer superjacent said first side of each said first conductive lines; g) forming a third dielectric layer blanketing said thick dielectric spacer, said second side of said first conductive lines and said first dielectric; h) placing a second conductive material superjacent said third dielectric layer; and i) patterning second conductive material thereby forming second conductive lines spaced apart in parallel columns, said parallel columns overlying said first conductive lines in an intersecting angular fashion.