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US5121004A Expired / Lapsed US ⏱️ 0.0 years remaining

Input buffer with temperature compensated hysteresis and thresholds, including negative input voltage protection

Assignee: Delphi Technologies Inc
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Filing: 1991-08-09
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Granted: 1992-06-09
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Expires: 2011-08-09
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Abstract

Abstract An input buffer apparatus receives data from a single ended transmission line and provides an output signal in one or two states in response to the state of the signal on the input. The apparatus has hysteresis with temperature stable upper and lower thresholds. Temperature stability is achieved by providing first and second temperature dependent reference currents, one with a positive temperature coefficient and one with a negative temperature coefficient and by adjusting the temperature coefficients of the first and second reference currents so that the sum effect of all of the temperature coefficients of the system is substantially zero.

Inventors

  • 👤 Scott B. Kesler
  • 👤 Mark W. Gose

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 16:30
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22; G05F3/222; G05F3/225; G05F3/30; H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/2893; H03K3/2897

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 293 words
An input buffer circuit for receiving data from a single ended transmission line and suitable for integration and having various components with temperature coefficients, comprising: a first temperature dependent current generator generating a first temperature dependent current having a positive temperature coefficient; a second temperature dependent current generator generating a second temperature dependent current having a negative temperature coefficient, the positive and negative temperature coefficients of the first and second temperature dependent currents offsetting the temperature coefficients of the various components of the input buffer circuit; an input circuit including first and second transistors connected such that when an emitter of the first transistor receives a voltage greater than a high threshold, the second transistor turns off and such that when the emitter of the first transistor receives a voltage less than a low threshold, the second transistor turns on; a threshold circuit coupled to the input circuit for selectively channeling portions of the first and second temperature dependent currents through a resistor in response to the state of the second transistor, the high and low thresholds being dependent upon the amount of current through the resistor; and an output circuit coupled to the threshold circuit for switching between first and second output signal levels in response to the threshold circuit such that the output circuit switches to the first output signal level when voltage above the high threshold is applied to the emitter of the first transistor and switches to the second output signal level when voltage below the low threshold is applied to the emitter of the first transistor, whereby the input buffer circuit has hysteresis, maintains substantially constant high and low thresholds independent of temperature and without requiring a temperature stable voltage supply, and has protection against negative input voltages.
Claim 2
Dependent Claim 293 words
An input buffer circuit for receiving data from a single ended transmission line and suitable for integration and having various components with temperature coefficients, comprising: a first temperature dependent current generator generating a first temperature dependent current having a positive temperature coefficient; a second temperature dependent current generator generating a second temperature dependent current having a negative temperature coefficient, the positive and negative temperature coefficients of the first and second temperature dependent currents offsetting the temperature coefficients of the various components of the input buffer circuit; an input circuit including first and second transistors connected such that when an emitter of the first transistor receives a voltage greater than a high threshold, the second transistor turns off and such that when the emitter of the first transistor receives a voltage less than a low threshold, the second transistor turns on; a threshold circuit coupled to the input circuit for selectively channeling portions of the first and second temperature dependent currents through a resistor in response to the state of the second transistor, the high and low thresholds being dependent upon the amount of current through the resistor; and an output circuit coupled to the threshold circuit for switching between first and second output signal levels in response to the threshold circuit such that the output circuit switches to the first output signal level when voltage above the high threshold is applied to the emitter of the first transistor and switches to the second output signal level when voltage below the low threshold is applied to the emitter of the first transistor, whereby the input buffer circuit has hysteresis, maintains substantially constant high and low thresholds independent of temperature and without requiring a temperature stable voltage supply, and has protection against negative input voltages.
Claim 3
Dependent Claim 84 words
The input buffer circuit of claim 1 wherein the amount of current through the resistor is substantially equal to a sum of all of the first temperature dependent current and half of the second temperature dependent current when the second transistor is turned off and wherein the amount of current through the resistor is substantially equal to a sum of three quarters of the first temperature dependent current and one quarter of the second temperature dependent current when the second transistor is turned on.
Claim 4
Dependent Claim 169 words
The input buffer circuit of claim 1, wherein the threshold circuit includes third and fourth transistors coupled to each other and to first and second four collector transistors, the first four collector transistor providing one quarter of the first temperature dependent current in each of its four collectors and the second four collector transistor providing one quarter of the second temperature dependent current in each of its four collectors, the transistors connected such that when the second transistor is in a conductive state, the fourth transistor transmits all of the first temperature dependent current from the first four collector transistor and a half of the second temperature dependent current from the second four collector transistor through the resistor, the transistors also connected such that when the second transistor is in a nonconductive state, the third transistor transmits three quarters of the first temperature dependent current from the first four collector transistor and one quarter of the second temperature dependent current from the second four collector transistor through the resistor.
Claim 5
Dependent Claim 287 words
An input buffer circuit for receiving data from a single ended transmission line and suitable for integration and having various components with temperature coefficients, comprising: means for generating a first temperature dependent current having a positive temperature coefficient; means for generating a second temperature dependent current having a negative temperature coefficient, the positive and negative temperature coefficients of the first and second temperature dependent currents offsetting the temperature coefficients of the various components of the input buffer circuit; input means for receiving an input signal including first and second transistors connected such that when an emitter of the first transistor receives a voltage greater than a high threshold, the second transistor turns off and such that when the emitter of the first transistor receives a voltage less than a low threshold, the second transistor turns on; threshold means, coupled to the input means, for selectively channeling portions of the first and second temperature dependent currents through a resistor in response to the state of the second transistor, the high and low thresholds being dependent upon the amount of current through the resistor; and output means, coupled to the threshold means, for switching between first and second output signal levels in response to the threshold circuit such that the output means switches to the first output signal level when voltage above the high threshold is applied to the emitter of the first transistor and switching to the second output signal level when voltage below the low threshold is applied to the emitter of the first transistor, whereby the input buffer circuit has hysteresis, maintains substantially constant high and low thresholds independent of temperature and without requiring a temperature stable voltage supply, and has protection against negative input voltages.
Claim 6
Dependent Claim 287 words
An input buffer circuit for receiving data from a single ended transmission line and suitable for integration and having various components with temperature coefficients, comprising: means for generating a first temperature dependent current having a positive temperature coefficient; means for generating a second temperature dependent current having a negative temperature coefficient, the positive and negative temperature coefficients of the first and second temperature dependent currents offsetting the temperature coefficients of the various components of the input buffer circuit; input means for receiving an input signal including first and second transistors connected such that when an emitter of the first transistor receives a voltage greater than a high threshold, the second transistor turns off and such that when the emitter of the first transistor receives a voltage less than a low threshold, the second transistor turns on; threshold means, coupled to the input means, for selectively channeling portions of the first and second temperature dependent currents through a resistor in response to the state of the second transistor, the high and low thresholds being dependent upon the amount of current through the resistor; and output means, coupled to the threshold means, for switching between first and second output signal levels in response to the threshold circuit such that the output means switches to the first output signal level when voltage above the high threshold is applied to the emitter of the first transistor and switching to the second output signal level when voltage below the low threshold is applied to the emitter of the first transistor, whereby the input buffer circuit has hysteresis, maintains substantially constant high and low thresholds independent of temperature and without requiring a temperature stable voltage supply, and has protection against negative input voltages.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-06-09 1995-12-09 1996-06-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-06-09 1999-12-09 2000-06-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-06-09 2003-12-09 2004-06-09 $7700.00 Window Closed / Lapsed

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