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US5111156A
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Current amplifier circuit
Assignee: Toshiba Corp
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Filing: 1990-11-29
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Granted: 1992-05-05
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Expires: 2010-11-29
Abstract
Abstract In a current amplifier circuit having a feedback type operational amplifier, the operational amplifier has at an output stage a signal detecting transistor through which a signal current flowing through the feedback loop flows. The current amplifier circuit further comprises a bias current adder circuit, a bias current subtractor circuit, and a reference bias generator. The bias current adder circuit allows a bias current to flow steadily through the signal current detecting transistor of the operational amplifier. The bias current subtracter circuit has a further transistor through which a current flows of a magnitude equal to the sum current of the signal current flowing through the signal current detecting transistor and the bias current, and subtracts the bias current from the current flowing through the transistor to output only the signal current. The reference bias generator circuit determines a magnitude of the bias current.
Inventors
- 👤 Masayuki Hachiuma
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:33
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/347; H03F3/04; H03F3/08
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
153 words
A current amplifier circuit comprising: an operational amplifier which has a feedback loop between an input terminal and an output terminal, and receives a current signal input at said input terminal to amplify the current signal, the operational amplifier having at an output stage a signal detecting transistor through which a signal current flowing through said feedback loop flows; a bias current adder circuit for allowing a bias current to flow steadily through the signal current detecting transistor of said operational amplifier; a bias current subtracter circuit which has a further transistor through which a current flows of a magnitude equal to the sum current of the signal current flowing through said signal current detecting transistor and the bias current, and subtracts the bias current from the current flowing through the further transistor to output only the signal current; and a reference bias generator circuit for determining a magnitude of said bias current.
Claim 2
Dependent Claim
153 words
A current amplifier circuit comprising: an operational amplifier which has a feedback loop between an input terminal and an output terminal, and receives a current signal input at said input terminal to amplify the current signal, the operational amplifier having at an output stage a signal detecting transistor through which a signal current flowing through said feedback loop flows; a bias current adder circuit for allowing a bias current to flow steadily through the signal current detecting transistor of said operational amplifier; a bias current subtracter circuit which has a further transistor through which a current flows of a magnitude equal to the sum current of the signal current flowing through said signal current detecting transistor and the bias current, and subtracts the bias current from the current flowing through the further transistor to output only the signal current; and a reference bias generator circuit for determining a magnitude of said bias current.
Claim 3
Dependent Claim
26 words
The current amplifier circuit according to claim 1, wherein said operational amplifier comprises a constant current source, a pair of differentially-connected transistors, and a current-mirror circuit.
Claim 4
Dependent Claim
48 words
The current amplifier circuit according to claim 2, wherein said pair of differentially-connected transistors comprise a pair of bipolar transistors, the base of one of the transistors is connected to said input terminal, and the base of the other of the transistors is connected to a bias potential.
Claim 5
Dependent Claim
18 words
The current amplifier circuit according to claim 3, wherein said pair of bipolar transistors are of PNP type.
Claim 6
Dependent Claim
18 words
The current amplifier circuit according to claim 3, wherein said pair of bipolar transistors are of NPN type.
Claim 7
Dependent Claim
51 words
The current amplifier circuit according to claim 2, wherein said pair of differentially-connected transistors comprise a pair of insulated-gate type field effect transistors, the gate of one of the transistors is connected to said input terminal, and the gate of the other of the transistors is connected to a bias potential.
Claim 8
Dependent Claim
19 words
The current amplifier circuit according to claim 6, wherein said pair of field effect transistors are of P-channel type.
Claim 9
Dependent Claim
19 words
The current amplifier circuit according to claim 6, wherein said pair of field effect transistors are of N-channel type.
Claim 10
Dependent Claim
23 words
The current amplifier circuit according to claim 6, wherein said pair of field effect transistors comprise a pair of metal oxide semiconductor transistors.
Claim 11
Dependent Claim
32 words
The current amplifier circuit according to claim 1, wherein said bias current adder circuit comprises a bipolar transistor whose base is controlled by an output potential of said reference bias generator circuit.
Claim 12
Dependent Claim
38 words
The current amplifier circuit according to claim 1, wherein said reference bias generator circuit comprises a reference bias generating transistor and a reference current source, which are connected in series between a power potential and a reference potential.
Claim 13
Dependent Claim
45 words
The current amplifier circuit according to claim 11, wherein said bias current adder circuit comprises a bipolar transistor controlled by a potential of the connected point of said reference bias generating transistor and said reference current source, which are in said reference bias generator circuit.
Claim 14
Dependent Claim
63 words
The current amplifier circuit according to claim 11, wherein said bias current subtracter circuit is connected to said further transistor through which a current equal to said sum current flows, and further includes a bipolar transistor controlled by a potential of the connected point of said reference bias generating transistor and said reference current source, which are in said reference bias generator circuit.
Claim 15
Dependent Claim
47 words
The current amplifier circuit according to claim 1, wherein said bias current subtracter circuit is connected to said further transistor through which a current equal to said sum current flow, and further includes a bipolar transistor controlled by an output potential of said reference bias generator circuit.
Claim 16
Dependent Claim
143 words
A current amplifier circuit comprising: a reference bias generating circuit for generating a reference bias; an operational amplifier for amplifying an input current, said operational amplifier including an input terminal for receiving the input current, an output terminal, a feedback loop between said input terminal and said output terminal, and a signal detector through which a signal current of said feedback loop flows; a bias current circuit responsive to the reference bias for providing a bias current which flows through said signal detector, whereby a sum current equal to said bias current and said signal current flows through said signal detector; and a bias current subtracting circuit having an input current equal to the current through said signal detector and subtracting a current equal to the bias current from the input current to output an output current signal equal to the signal current.
Claim 17
Dependent Claim
143 words
A current amplifier circuit comprising: a reference bias generating circuit for generating a reference bias; an operational amplifier for amplifying an input current, said operational amplifier including an input terminal for receiving the input current, an output terminal, a feedback loop between said input terminal and said output terminal, and a signal detector through which a signal current of said feedback loop flows; a bias current circuit responsive to the reference bias for providing a bias current which flows through said signal detector, whereby a sum current equal to said bias current and said signal current flows through said signal detector; and a bias current subtracting circuit having an input current equal to the current through said signal detector and subtracting a current equal to the bias current from the input current to output an output current signal equal to the signal current.
Claim 18
Dependent Claim
26 words
The current amplifier circuit according to claim 15, wherein said bias current circuit comprises a first bipolar transistor having a base controlled by the reference bias.
Claim 19
Dependent Claim
55 words
The current amplifier circuit according to claim 16, wherein said reference bias generator circuit comprises a second bipolar transistor and a current source connected in series between a power supply potential and a reference potential, the base of said first bipolar transistor coupled to a point between the series-connected second bipolar transistor and current source.
References Cited (Backward Citations)
US4338527A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-05-05 | 1995-11-04 | 1996-05-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-05-05 | 1999-11-04 | 2000-05-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-05-05 | 2003-11-04 | 2004-05-05 | $7700.00 | Window Closed / Lapsed |