US5108936A
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Method of producing a bipolar transistor having an amorphous emitter formed by plasma cvd
Assignee: Imec
•
Filing: 1991-05-21
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Granted: 1992-04-28
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Expires: 2011-05-21
Abstract
Abstract A bipolar hetero-junction transistor has an emitter formed which consists of doped and hydrogenated semiconductor material which is at least partly in amorphous form. A high current gain ( beta ) is obtained due to the wide bandgap in the emitter material. Preferably, the layer forming the emitter consists of microcrystalline silicon which is doped and hydrogenated. This yields a small base resistance which is preferable for high frequency purposes. The amorphous bipolar hetero-junction transistor can be produced by a CVD-technique, by using a plasma or by photodissociation. The transistor having a microcrystalline emitter layer can be produced by one of the above methods or by heating an amorphous emitter layer.
Inventors
- 👤 Moustafa Y. Ghannam
- 👤 Robert Mertens
- 👤 Johan Nijs
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 04:53
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/021; H10D10/80; H10D10/821; H10D10/861; H10D62/00; H10D62/10; H10D62/13; H10D62/133; H10D62/136; H10D62/40; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P14/3444; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6336; Y; Y10; Y10S; Y10S148/00; Y10S148/011
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
153 words
A method of producing a bipolar transistor of semiconductor material, comprising the steps of: a. providing a collector layer of one conductivity type; b. providing a crystalline, doped base layer of silicon material of the opposite conductivity type in or on said collector layer; c. applying a doped emitter layer of hydrogenated silicon material at least partly in an amorphous form of said first conductivity type onto said base layer, said emitter layer having a wider energy band gap than said base layer, said emitter layer being applied onto said base layer at a temperature below 450° C. by means of a chemical vapor deposition, so that the dopant of the emitter layer does not diffuse into the base layer, thereby providing a sharply defined transition between the energy band gap of said emitter layer and the energy band gap of said base layer for producing the bipolar transistor with high gain characteristics.
Claim 2
Independent Claim
153 words
A method of producing a bipolar transistor of semiconductor material, comprising the steps of: a. providing a collector layer of one conductivity type; b. providing a crystalline, doped base layer of silicon material of the opposite conductivity type in or on said collector layer; c. applying a doped emitter layer of hydrogenated silicon material at least partly in an amorphous form of said first conductivity type onto said base layer, said emitter layer having a wider energy band gap than said base layer, said emitter layer being applied onto said base layer at a temperature below 450° C. by means of a chemical vapor deposition, so that the dopant of the emitter layer does not diffuse into the base layer, thereby providing a sharply defined transition between the energy band gap of said emitter layer and the energy band gap of said base layer for producing the bipolar transistor with high gain characteristics.
Claim 3
Dependent Claim
33 words
A method according to claim 1, wherein said chemical vapor deposition is a plasma deposition and said plasma substantially comprises; silane (SiH 4 ); phosphine (PH 3 ); and hydrogen (H 2 ).
Claim 4
Dependent Claim
51 words
A method according to claim 1, wherein said at least partly amorphous form ranges from completely amorphous hydrogenated silicon (α-Si:H) to microcrystalline silicon (μc-Si) consisting of small crystallines showing typical average dimensions between 2-100 nm, which are embedded in an amorphous matrix of a continuous structure of grains and grain boundaries.
Claim 5
Independent Claim
148 words
A method of processing a semiconductor bipolar transistor, comprising the steps of: a. providing a doped crystalline collector layer of a first conductivity type; b. forming a doped crystalline base layer of silicon material of a second conductivity type opposite to said first type in a portion of said collector layer; and c. forming a doped emitter layer of said first conductivity type in said base layer, said emitter layer having a wider energy band gap than said base layer, said emitter layer being applied onto said base layer by means of a plasma deposition at a temperature below 250° C. so that the dopant of the emitter layer does not diffuse into the base layer, thereby providing a sharply defined transition between the energy gap of said emitter layer and the energy gap of said base layer for producing the bipolar transistor with a high gain characteristics.
Claim 6
Independent Claim
148 words
A method of processing a semiconductor bipolar transistor, comprising the steps of: a. providing a doped crystalline collector layer of a first conductivity type; b. forming a doped crystalline base layer of silicon material of a second conductivity type opposite to said first type in a portion of said collector layer; and c. forming a doped emitter layer of said first conductivity type in said base layer, said emitter layer having a wider energy band gap than said base layer, said emitter layer being applied onto said base layer by means of a plasma deposition at a temperature below 250° C. so that the dopant of the emitter layer does not diffuse into the base layer, thereby providing a sharply defined transition between the energy gap of said emitter layer and the energy gap of said base layer for producing the bipolar transistor with a high gain characteristics.
Claim 7
Dependent Claim
21 words
A method, as claimed in claim 4, wherein said plasma deposition comprises SiH 4 , PH 3 and H 2 .
Claim 8
Dependent Claim
25 words
A method, as claimed in claim 4, wherein said emitter layer comprises a doped and hydrogenated semiconductor material in at least a partly amorphous form.
Claim 9
Dependent Claim
24 words
A method, as claimed in claim 6, wherein said emitter layer comprising said partly amorphous form ranges from completely hydrogenated silicon to microcrystalline silicon.
Claim 10
Dependent Claim
21 words
A method, as claimed in claim 4, wherein said base layer is formed to a thickness of less than 0.5 μm.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1995-04-28 | 1995-10-28 | 1996-04-28 | $2000.00 | Window Closed / Lapsed |
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