Patent US5099152A successfully refreshed from Google Patents.
US5099152A
Expired / Lapsed
US
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Superconducting circuit having an output conversion circuit
Assignee: Fujitsu Ltd
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Filing: 1991-02-06
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Granted: 1992-03-24
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Expires: 2011-02-06
Abstract
Abstract A superconducting circuit for performing a logic operation and producing an output indicative of the result of the logic operation with a logic amplitude suitable for processing by an external circuit, is provided by a Josephson processing circuit which performs the logic operation and produces an output logic signal with a first logic amplitude, a voltage amplification circuit which is supplied with the output logic signal from the Josephson processing circuit and produces an output signal having a second logic amplitude which is substantially larger than the first logic amplitude, and an impedance conversion circuit which is supplied with the output signal of the voltage amplification means and produces the output of the superconducting circuit, with an output impedance suitable for transferring to the external circuit. The voltage amplification circuit includes a plurality of superconducting quantum devices connected in series and produces the output signal of the second logic amplitude as a sum of the voltage transitions caused in response to the respective transitions of the Josephson junctions included therein. The impedance conversion circuit provides a high input impedance such that the operation of the voltage amplification circuit is not influenced by the current associated with the output signal to the impedance conversion circuit.
Inventors
- 👤 Hideo Suzuki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 03:25
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0175; H03K19/017509; H03K19/017545; H03K19/02; H03K19/195; H03K19/1952; Y; Y10; Y10S; Y10S505/00; Y10S505/825; Y10S505/856; Y10S505/857; Y10S505/858
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
346 words
A superconducting circuit for performing a logic operation and producing an output indicative of the result of the logic operation with a logic amplitude suitable for processing by an external circuit, comprising: a Josephson processing circuit, comprising one or more Josephson devices, for performing the logic operation and for producing an output logic signal having a first logic amplitude corresponding to the logic operation; voltage amplification means, supplied with the output logic signal from the Josephson processing circuit, for producing an output signal having a second logic amplitude that is substantially larger than the first logic amplitude, said voltage amplification means comprising a plurality of superconducting quantum interference devices each having a control line coupled magnetically thereto, each of said superconducting quantum interference devices being supplied with a bias current for causing a transition from a superconducting state to a finite voltage state in response to a signal on the control line, said superconducting quantum interference devices being connected in series such that the bias current flows consecutively through the plurality of superconducting quantum interference devices, said output logic signal of the Josephson processing circuit being passed consecutively through the control line of the plurality of superconducting quantum interference devices, for causing the transition from the superconducting state to the finite voltage state in the superconducting quantum interference devices, each superconducting quantum interference device producing an elemental logic amplitude in response to the transition to the finite voltage state, said voltage amplification means producing the output signal having the second logic amplitude as a sum of the elemental logic amplitudes of the plurality of superconducting quantum interference devices; and impedance conversion means supplied with the output signal of the voltage amplification means for producing the output of the superconducting circuit with an output impedance suitable for transferring to the external circuit, said impedance conversion means having an input impedance, when viewed from the voltage amplification means, which is sufficiently large such that the transition of the superconducting quantum interference devices in the voltage amplification means is not influenced by the presence of the impedance conversion means.
Claim 2
Dependent Claim
346 words
A superconducting circuit for performing a logic operation and producing an output indicative of the result of the logic operation with a logic amplitude suitable for processing by an external circuit, comprising: a Josephson processing circuit, comprising one or more Josephson devices, for performing the logic operation and for producing an output logic signal having a first logic amplitude corresponding to the logic operation; voltage amplification means, supplied with the output logic signal from the Josephson processing circuit, for producing an output signal having a second logic amplitude that is substantially larger than the first logic amplitude, said voltage amplification means comprising a plurality of superconducting quantum interference devices each having a control line coupled magnetically thereto, each of said superconducting quantum interference devices being supplied with a bias current for causing a transition from a superconducting state to a finite voltage state in response to a signal on the control line, said superconducting quantum interference devices being connected in series such that the bias current flows consecutively through the plurality of superconducting quantum interference devices, said output logic signal of the Josephson processing circuit being passed consecutively through the control line of the plurality of superconducting quantum interference devices, for causing the transition from the superconducting state to the finite voltage state in the superconducting quantum interference devices, each superconducting quantum interference device producing an elemental logic amplitude in response to the transition to the finite voltage state, said voltage amplification means producing the output signal having the second logic amplitude as a sum of the elemental logic amplitudes of the plurality of superconducting quantum interference devices; and impedance conversion means supplied with the output signal of the voltage amplification means for producing the output of the superconducting circuit with an output impedance suitable for transferring to the external circuit, said impedance conversion means having an input impedance, when viewed from the voltage amplification means, which is sufficiently large such that the transition of the superconducting quantum interference devices in the voltage amplification means is not influenced by the presence of the impedance conversion means.
Claim 3
Dependent Claim
158 words
A superconducting circuit as claimed in claim 1 in which each of said plurality of superconducting quantum interference devices comprises a first inductance and a second inductance having respective first ends connected to each other at a center node, a first Josephson junction having a first terminal connected to the center node, a second Josephson junction having a first terminal connected to a second, opposing end of the first inductance, a third Josephson junction having a first terminal connected to a second, opposing end of the second inductance, said first, second and third Josephson junctions having respective second terminals opposite to the first terminals such that the second terminals are connected commonly with each other to form the superconducting quantum interference devices, wherein said bias current is supplied to each superconducting quantum interference device at the center node and passed to the next superconducting quantum interference device at the second end of the first through third Josephson junctions.
Claim 4
Dependent Claim
295 words
A superconducting circuit as claimed in claim 1 in which each of said plurality of superconducting quantum interference devices comprises a first part including a first inductance and a second inductance having respective first ends connected each other at a center node, a first Josephson junction having a first terminal connected to the center node, a second Josephson junction having a first terminal connected to a second, opposing end of the first inductance, a third Josephson junction having a first terminal connected to a second, opposing end of the second inductance, said first, second and third Josephson junctions having respective second terminals opposite to the first terminals such that the second terminals are connected commonly with each other to form superconducting interference devices, a second part including a first inductance and a second inductance having respective first ends connected each other at a center node, a first Josephson junction having a first terminal connected to the center node, a second Josephson junction having a first terminal connected to a second, opposing end of the first inductance, a third Josephson junction having a first terminal connected to a second, opposing end of the second inductance, said first, second and third Josephson junctions having respective second terminals opposite to the first terminals such that the second terminals are connected commonly with each other to the superconducting quantum interference devices, said second terminals of the first through third Josephson junctions of the first part being connected to said second terminals of the first through third Josephson junctions of the second part, wherein, in each superconducting quantum interference device, the bias current is supplied to the center node of the first part and passed to the next superconducting quantum interference device via the center node of the second part.
Claim 5
Dependent Claim
127 words
A superconducting circuit as claimed in claim 1 in which each of said plurality of superconducting quantum interference devices comprises a first inductance and a second inductance having respective first ends connected to each other at a center node, a first Josephson junction having a first terminal connected to a second, opposing end of the first inductance, and a second Josephson junction having a first terminal connected to a second, opposing end of the second inductance, said first and second Josephson junctions having respective second terminals connected to each other to form the respective superconducting interference device, wherein said bias current is supplied to the center node and passed to the next superconducting quantum interference device via the second terminals of the first and second Josephson junctions.
Claim 6
Dependent Claim
59 words
A superconducting circuit as claimed in claim 1 in which said control lines of the plurality of superconducting quantum interference devices are connected in series to form a single signal path, and said output logic signal of the Josephson processing circuit is distributed to all the superconducting quantum interference devices that are coupled magnetically to the single signal path.
Claim 7
Dependent Claim
115 words
A superconducting circuit as claimed in claim 3 in which each of said control lines of the plurality of superconducting quantum devices includes a first inductance and a second inductance connected in series, each of said control lines corresponding to the plurality of superconducting quantum interference devices being connected in series to form a single signal path of the output logic signal of the Josephson processing circuit, and wherein, in each superconducting quantum interference device, the first inductance of the control line is coupled magnetically to the first inductance of the superconducting quantum interference device, and the second inductance of the control line is coupled magnetically to the second inductance of the superconducting quantum device.
Claim 8
Dependent Claim
141 words
A superconducting circuit as claimed in claim 3 in which each of said control lines of the plurality of superconducting quantum interference devices includes a first inductance and a second inductance respectively coupled magnetically to the first and second inductances of the corresponding superconducting quantum interference device, said control lines being connected in series to form a single signal path of the output logic signal of the Josephson processing circuit, said control lines being connected such that the first inductances of the control lines are connected consecutively to form a first half of the signal path and such that the second inductances of the control lines are connected consecutively to form a second half of the signal path and, wherein said first half and said second half of the signal path are connected in series to complete the single signal path.
Claim 9
Dependent Claim
137 words
A superconducting circuit as claimed in claim 1 in which said impedance conversion means comprises a semiconductor circuit having a high input impedance, said semiconductor circuit being supplied with the output signal of the amplification means for producing the output of the superconducting circuit in response to the output signal supplied thereto, and an output cable, having a predetermined impedance, for supplying the output of the superconducting circuit to the external circuit, said predeterimined impedance being determined in accordance with matching the input impedance of the external circuit, said semiconductor circuit comprising a high electron mobility transistor having a gate to which the output signal of the amplification means is supplied, and said high electron mobility transistor having a source-follower construction thereby affording an output impedance thereof which is compatible with the impedance of the output cable.
Claim 10
Dependent Claim
167 words
A superconducting circuit as claimed in claim 1 in which said impedance conversion means comprises a semiconductor circuit having a high input impedance, said semiconductor circuit being supplied with the output signal of the amplification means for producing the output of the superconducting circuit in response to the output signal supplied thereto, and an output cable, having a predetermined impedance, for supplying the output of the superconducting circuit to the external circuit, said predetermined impedance being determined in accordance with matching the input impedance of the external circuit, said semiconductor circuit comprising bipolar transistors forming an emitter-coupled logic circuit configured to receive the output signal of the voltage amplification means, and an output buffer circuit comprising a bipolar transistor configured as an emitter-follower and having an output impedance compatible with the impedance of the output cable, and said output buffer circuit being supplied with an output of the emitter-coupled logic for producing the output of the superconducting circuit and supplying the output thereof to the output cable.
Claim 11
Dependent Claim
108 words
A superconducting circuit as claimed in claim 1 in which said impedance conversion means comprises a transformer having a primary winding and a secondary winding coupled magnetically with each other and an output cable having a predetermined impedance determined in accordance with matching the input impedance of the external circuit, said primary winding having an impedance set to be equal to the input impedance and sufficiently high such that the transition of the superconducting quantum interference devices of the voltage amplification means is not influenced by the presence of the impedance conversion means, said secondary winding having an impedance set to match the impedance of the output cable.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-03-24 | 1995-09-23 | 1996-03-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-03-24 | 1999-09-23 | 2000-03-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-03-24 | 2003-09-23 | 2004-03-24 | $7700.00 | Window Closed / Lapsed |