US4559459A
Expired / Lapsed
US
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High gain non-linear threshold input Josephson junction logic circuit
Assignee: Unisys Corp
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Filing: 1983-03-30
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Granted: 1985-12-17
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Expires: 2003-03-30
Abstract
Abstract A high gain Josephson junction logic circuit is provided. The novel circuit comprises a high gain non-linear threshold input Josephson junction logic circuit which is coupled to a high gain Josephson junction amplifier. The high gain input circuit provides the capability of driving a larger number of output circuits or employing a larger number of input signals.
Inventors
- 👤 Tsing-Chow Wang
- 👤 Richard M. Josephs
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 06:19
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/195; H03K19/1954; H03K19/1956; Y; Y10; Y10S; Y10S505/00; Y10S505/825; Y10S505/856; Y10S505/857; Y10S505/858; Y10S505/859
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
166 words
A high gain non-linear threshold input logic circuit, comprising: a supply current source, a low reference voltage, an output branch connected in series between said supply current source and said low reference voltage, said output branch comprising an output branch resistor in series with an output Josephson junction device, an input branch connected in series between said supply current source and said low reference voltage, said input branch comprising a branch resistor, an input Josephson junction device and a sink resistor in series, an input node between said input Josephson junction device and said sink resistor, non-linear threshold input logic circuit means coupled to said input node of said input branch, said non-linear threshold input logic circuit means comprising a plurality of input gate circuits coupled to said input node, biasing means for applying a biasing current to said input node, and said non-linear threshold input logic circuit means being coupled to said input node and said biasing means for providing a non-linear input threshold characteristic.
Claim 2
Dependent Claim
166 words
A high gain non-linear threshold input logic circuit, comprising: a supply current source, a low reference voltage, an output branch connected in series between said supply current source and said low reference voltage, said output branch comprising an output branch resistor in series with an output Josephson junction device, an input branch connected in series between said supply current source and said low reference voltage, said input branch comprising a branch resistor, an input Josephson junction device and a sink resistor in series, an input node between said input Josephson junction device and said sink resistor, non-linear threshold input logic circuit means coupled to said input node of said input branch, said non-linear threshold input logic circuit means comprising a plurality of input gate circuits coupled to said input node, biasing means for applying a biasing current to said input node, and said non-linear threshold input logic circuit means being coupled to said input node and said biasing means for providing a non-linear input threshold characteristic.
Claim 3
Dependent Claim
35 words
A high gain non-linear threshold input logic circuit as set forth in claim 1 wherein said non-linear threshold input logic circuit means comprises an interferometer coupled between said low reference voltage and said input node.
Claim 4
Dependent Claim
35 words
A high gain non-linear threshold input logic circuit as set forth in claim 2 wherein said interferometer comprises a plurality of branches and wherein said biasing means is coupled to one branch of said interferometer.
Claim 5
Dependent Claim
29 words
A high gain non-linear threshold logic input circuit as set forth in claim 3 wherein said plurality of input gate circuits comprise inputs of an OR gate logic circuit.
Claim 6
Dependent Claim
36 words
A high gain non-linear threshold input logic circuit as set forth in claim 1 wherein said non-linear threshold input logic circuit means comprises a resistor network coupled between said low reference voltage and said input node.
Claim 7
Dependent Claim
48 words
A high gain non-linear threshold input logic circuit as set forth in claim 5 wherein said resistor network further comprises source resistors in each of said plurality of input gate circuits, and a third Josephson junction device coupled between said input gate circuits and said low reference voltage.
Claim 8
Dependent Claim
34 words
A high gain non-linear threshold input logic circuit as set forth in claim 6 which further includes a bridging resistor forming a shunt across said source resistors in said plurality of input gate circuits.
Claim 9
Dependent Claim
29 words
A high gain non-linear threshold input logic circuit as set forth in claim 7 wherein said plurality of input gate circuits each comprise an input of an AND gate.
Claim 10
Dependent Claim
46 words
A high gain non-linear threshold input logic circuit as set forth in claim 5 wherein said plurality of input gate circuits are coupled to fourth and fifth Josephson junction devices which are adapted to sequentially switch a third Josephson junction device having a non-linear threshold characteristic.
References Cited (Backward Citations)
US4117354A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-12-16 | 1989-06-17 | 1989-12-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-12-16 | 1993-06-17 | 1993-12-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-12-16 | 1997-06-17 | 1997-12-17 | $7700.00 | Window Closed / Lapsed |