Abstract A method for manufacturing a semiconductor substrate device having a non-volatile memory cell region and a logic region including MOS transistors. A first insulating film and a first electrode layer are formed on a semiconductor substrate. Only those portions of the first insulating film and first electrode layer which are located in the logic region are removed, without removing those portions of the first insulating film and first electrode layer which are located in the non-volatile memory cell region. A sacrificial film is deposited for insulation over the entire surface of the memory cell region and logic region, and then a resist film is coated on the sacrificial film. Subsequently, impurity ions are implanted into a desired channel region located in the logic region. The resist film and sacrificial film are removed, and thereafter a second insulating film and a second electrode layer are formed.
A method for manufacturing a semiconductor device having a non-volatile memory cell region and a logic region including MOS transistors, comprising the steps of: forming a first insulating film and a first electrode layer on a semiconductor substrate including the memory cell region and the logic region; removing the first insulating film and first electrode layer which are on the logic region, without removing the first insulating film and first electrode layer on the non-volatile memory cell region; forming a sacrificial film for insulation over the entire surface of the logic region and the memory cell region without oxidation of the first electrode layer; and coating a resist film on the sacrificial film; forming an opening in a portion of the resist film on the logic region, and implanting impurity ions into the logic region through the opening; and removing the resist film and sacrificial film, and forming a second insulating film and a second electrode layer over the non-volatile memory cell region and the logic region.
Claim 2
Independent Claim
167 words
A method for manufacturing a semiconductor device having a non-volatile memory cell region and a logic region including MOS transistors, comprising the steps of: forming a first insulating film and a first electrode layer on a semiconductor substrate including the memory cell region and the logic region; removing the first insulating film and first electrode layer which are on the logic region, without removing the first insulating film and first electrode layer on the non-volatile memory cell region; forming a sacrificial film for insulation over the entire surface of the logic region and the memory cell region without oxidation of the first electrode layer; and coating a resist film on the sacrificial film; forming an opening in a portion of the resist film on the logic region, and implanting impurity ions into the logic region through the opening; and removing the resist film and sacrificial film, and forming a second insulating film and a second electrode layer over the non-volatile memory cell region and the logic region.
Claim 3
Dependent Claim
19 words
The method according to claim 1, wherein the sacrificial film is an insulating film formed by chemical vapor deposition.