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Patent US5093700A successfully refreshed from Google Patents.
US5093700A
Expired / Lapsed
US
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Single gate structure with oxide layer therein
Assignee: Renesas Electronics America Inc
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Filing: 1991-04-08
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Granted: 1992-03-03
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Expires: 2011-04-08
Abstract
Abstract A FET transistor has a gate structure consisting of at least three layers of polysilicon with a thin oxide layer on the order of atoms thick separating each of the layers. A method for formation of the multilayer gate structure and the formation of resistors comprised of layers of polysilicon separated by oxide layers are also provided.
Inventors
- 👤 Masanori Sakata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 22:04
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H01; H01R; H01R13/00; H01R13/46; H01R13/52; H01R13/521
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
105 words
A semiconductor device having a single conductive gate structure comprised of at least: a first layer of a first material; a first layer of a second material disposed on the first layer of the first material; a second layer of the first material disposed on the first layer of the second material; a second layer of the second material disposed on the second layer of the first material; and a third layer of the first material disposed on the second layer of the second material; wherein the single conductive gate structure is capable of carrying an electric current which passes through all of the layers.
Claim 2
Dependent Claim
105 words
A semiconductor device having a single conductive gate structure comprised of at least: a first layer of a first material; a first layer of a second material disposed on the first layer of the first material; a second layer of the first material disposed on the first layer of the second material; a second layer of the second material disposed on the second layer of the first material; and a third layer of the first material disposed on the second layer of the second material; wherein the single conductive gate structure is capable of carrying an electric current which passes through all of the layers.
Claim 3
Dependent Claim
15 words
A semiconductor device, as in claim 1, wherein the first material is comprised of polysilicon.
Claim 4
Dependent Claim
13 words
A semiconductor device, as in claim 2, wherein the polysilicon layers are doped.
Claim 5
Dependent Claim
30 words
A semiconductor device, as in claim 1 wherein the second material is comprised of silicon dioxide and each layer of the second material is no more than 5 Å thick.
Claim 6
Dependent Claim
16 words
A semiconductor device, as in claim 1, wherein the structure is a gate of a transistor.
Claim 7
Dependent Claim
13 words
A semiconductor device, as in claim 1, wherein the structure is a resistor.
Claim 8
Dependent Claim
87 words
A field effect transistor having a source region, a drain region and a single gate structure, said single gate structure comprising: a first polysilicon layer, a first oxide layer no more than 5 Å thick disposed on the first silicon layer, a second silicon layer disposed on the first oxide layer, a second oxide layer disposed on the second silicon layer, and a third silicon layer disposed on the second oxide layer; wherein the single gate structure carries an electric current which flows through all the layers.
Claim 9
Dependent Claim
87 words
A field effect transistor having a source region, a drain region and a single gate structure, said single gate structure comprising: a first polysilicon layer, a first oxide layer no more than 5 Å thick disposed on the first silicon layer, a second silicon layer disposed on the first oxide layer, a second oxide layer disposed on the second silicon layer, and a third silicon layer disposed on the second oxide layer; wherein the single gate structure carries an electric current which flows through all the layers.
Claim 10
Dependent Claim
15 words
A semiconductor device, as in claim 7, wherein the silicon layers are comprised of polysilicon.
Claim 11
Dependent Claim
13 words
A semiconductor device, as in claim 8, wherein the polysilicon layers are doped.
Claim 12
Dependent Claim
103 words
A semiconductor device having a single conductive gate structure comprising: a first polysilicon layer; a first layer of insulating material no more than 5 Å thick formed on the first polysilicon layer; a second polysilicon layer formed on the first layer of insulating material; a second layer of insulating material no more than 5 Å thick formed on the second polysilicon layer; and a third polysilicon layer formed on the second layer of insulating material; wherein an electric current flows from the first polysilicon layer to the third polysilicon layer through the first and second insulating layers of the single conductive gate structure.
Claim 13
Dependent Claim
103 words
A semiconductor device having a single conductive gate structure comprising: a first polysilicon layer; a first layer of insulating material no more than 5 Å thick formed on the first polysilicon layer; a second polysilicon layer formed on the first layer of insulating material; a second layer of insulating material no more than 5 Å thick formed on the second polysilicon layer; and a third polysilicon layer formed on the second layer of insulating material; wherein an electric current flows from the first polysilicon layer to the third polysilicon layer through the first and second insulating layers of the single conductive gate structure.
Claim 14
Dependent Claim
96 words
A field effect transistor having a source region, a drain region and a gate structure, said gate structure comprising: a first polysilicon layer, a first oxide layer disposed on the first silicon layer, a second silicon layer disposed on the first oxide layer, a second oxide layer disposed on the second silicon layer, and a third silicon layer disposed on the second oxide layer wherein the gate structure carries an electric current which flows through all the layers, and a total thickness of the gate structure is about equal to that of a single polysilicon gate.
Claim 15
Dependent Claim
96 words
A field effect transistor having a source region, a drain region and a gate structure, said gate structure comprising: a first polysilicon layer, a first oxide layer disposed on the first silicon layer, a second silicon layer disposed on the first oxide layer, a second oxide layer disposed on the second silicon layer, and a third silicon layer disposed on the second oxide layer wherein the gate structure carries an electric current which flows through all the layers, and a total thickness of the gate structure is about equal to that of a single polysilicon gate.
Claim 16
Dependent Claim
114 words
A semiconductor device having a conductive gate structure comprising: a first polysilicon layer; a first layer of insulating material no more than 5 Å thick formed on the first polysilicon layer; a second polysilicon layer formed on the first layer of insulating material; a second layer of insulating material no more than 5 Å thick formed on the second polysilicon layer; and a third polysilicon layer formed on the second layer of insulating material; wherein an electric current flows from the first polysilicon layer to the third polysilicon layer through the first and second insulating layers, and a total thickness of the gate structure is about equal to that of a single polysilicon gate.
Claim 17
Dependent Claim
114 words
A semiconductor device having a conductive gate structure comprising: a first polysilicon layer; a first layer of insulating material no more than 5 Å thick formed on the first polysilicon layer; a second polysilicon layer formed on the first layer of insulating material; a second layer of insulating material no more than 5 Å thick formed on the second polysilicon layer; and a third polysilicon layer formed on the second layer of insulating material; wherein an electric current flows from the first polysilicon layer to the third polysilicon layer through the first and second insulating layers, and a total thickness of the gate structure is about equal to that of a single polysilicon gate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-03-03 | 1995-09-02 | 1996-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-03-03 | 1999-09-02 | 2000-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-03-03 | 2003-09-02 | 2004-03-03 | $7700.00 | Window Closed / Lapsed |