Patent US5084408A successfully refreshed from Google Patents.
US5084408A
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Method of making complete dielectric isolation structure in semiconductor integrated circuit
Assignee: Toshiba Corp
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Filing: 1990-10-15
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Granted: 1992-01-28
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Expires: 2010-10-15
Abstract
Abstract For controlling unwanted production of crystal defects from corners of isolated regions in a complete dielectric isolation structure, after at least one trench or groove is provided through a mask of an insulating film in a semiconductor substrate adhered to an insulating film of a base substrate, the mask is side-etched and the insulating film of the base substrate is selectively etched at the same time to expose corners of the semiconductor substrate. The exposed corners of the semiconductor substrate is then subjected to isotropic etching to remove a pointed portion therefrom. Thereafter, side surfaces of the semiconductor substrate exposed within the trench is oxidized to provide an insulating film for dielectric isolation which has rounded corners.
Inventors
- 👤 Yoshiro Baba
- 👤 Yutaka Koshino
- 👤 Akihiko Osawa
- 👤 Satoshi Yanagiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 20:27
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W10/041; H10W10/061; H10W10/10; H10W10/13; H10W10/181; H10W10/40; H10W10/014; H10W10/17; Y; Y10; Y10S; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
162 words
A method of making a complete dielectric isolation structure in a semiconductor integrated circuit comprising the steps of: preparing a base substrate having a first insulating film thereon; adhering a semiconductor substrate to said first insulating film of said base substrate; forming a second insulating on said semiconductor substrate; patterning said second insulating film to provide a mask on said semiconductor substrate; selectively etching said semiconductor substrate through said mask to provide at least one trench reaching to said first insulating film, said trench having corners on said semiconductor substrate; side-etching said mask in an amount required to achieve subsequent rounding of said corners and simultaneously selectively etching said first insulating film to expose said corners on said semiconductor substrate; subjecting said exposed corners of said semiconductor substrate to isotropic etching; oxidizing side surfaces of said semiconductor substrate exposed within said trench to provide a third insulating film thereon and to round said corners; and filling said trench with a polysilicon layer.
Claim 2
Independent Claim
162 words
A method of making a complete dielectric isolation structure in a semiconductor integrated circuit comprising the steps of: preparing a base substrate having a first insulating film thereon; adhering a semiconductor substrate to said first insulating film of said base substrate; forming a second insulating on said semiconductor substrate; patterning said second insulating film to provide a mask on said semiconductor substrate; selectively etching said semiconductor substrate through said mask to provide at least one trench reaching to said first insulating film, said trench having corners on said semiconductor substrate; side-etching said mask in an amount required to achieve subsequent rounding of said corners and simultaneously selectively etching said first insulating film to expose said corners on said semiconductor substrate; subjecting said exposed corners of said semiconductor substrate to isotropic etching; oxidizing side surfaces of said semiconductor substrate exposed within said trench to provide a third insulating film thereon and to round said corners; and filling said trench with a polysilicon layer.
Claim 3
Dependent Claim
18 words
The method according to claim 1, wherein said corners of said semiconductor substrate include upper and lower corners.
Claim 4
Dependent Claim
18 words
The method according to claim 1, wherein said isotropic etching provides an arc-shaped recessed portion at said corners.
Claim 5
Dependent Claim
21 words
The method according to claim 1, wherein a thickness of said third insulating film is of the order of 8000 Å.
Claim 6
Dependent Claim
37 words
The method according to claim 1, wherein an amount of side-etching said mask is 3000 Å to ≦10000 Å, while an amount of isotropically etching said corners of said semiconductor substrate is 1500 Å to 5000 Å.
Claim 7
Dependent Claim
16 words
The method according to claim 1, wherein said base substrate is comprised of a semiconductor substrate.
Claim 8
Dependent Claim
16 words
The method according to claim 1, wherein an exposed surface of said polysilicon layer is oxidized.
Claim 9
Dependent Claim
16 words
The method according to claim 1, wherein said mask is comprised of said second insulating film.
References Cited (Backward Citations)
US3391023A
Cited
US3343255A
Cited
US4017341A
Cited
US4645564A
Cited
US4845048A
Cited
US4916086A
Cited
US4985745A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-01-27 | 1995-07-29 | 1996-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-01-27 | 1999-07-29 | 2000-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-01-27 | 2003-07-29 | 2004-01-28 | $7700.00 | Window Closed / Lapsed |