Patent US5835545A successfully refreshed from Google Patents.
Patent US5083095A successfully refreshed from Google Patents.
US5083095A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Plural source follower amplifier
Assignee: Knowles Electronics LLC
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Filing: 1990-08-22
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Granted: 1992-01-21
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Expires: 2010-08-22
Abstract
Abstract An amplifier having improved input impedance and reduced susceptibility to power supply ripple, particularly suited for use with a high impedance signal source, utilizes at least two field-effect transistors; the signal source is connected to the gate of the first FET, which is connected to a reference potential by a high resistance, whereas the source electrode of the first FET is connected to the reference potential (usually ground) through a much smaller load resistance and is also connected to the gate of the second FET. The source of the second FET is connected to the drain of the first FET and the drain of the second FET is connected to a power source, usually a low voltage source.
Inventors
- 👤 Peter L. Madaffari
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:25
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/345; H03F3/50; H03F3/505; H04; H04R; H04R25/00; H04R25/45; H04R25/456
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
166 words
An impedance conversion amplifier that is effective to suppress ripple and other extraneous signals from a power supply comprising: first and second field-effect transistors (FETs) each having gate, source, and drain electrodes; input means for applying an A.C. input signal to the gate of the first FET, the input means including a very high impedance input resistor connected from the gate of the first FET to the reference potential; a load resistor connecting the source of the first FET to a reference potential; connector means connecting the drain and source of the first FET to the source and gate, respectively, of the second FET; and means for connecting the drain of the second FET to a low voltage power supply; whereby the first FET affords the functions of impedance conversion and gate bias for the second FET and the second FET provides a relatively constant operating voltage for the first FET, driving the drain of the first FET to near the A.C. potential of its gate.
Claim 2
Dependent Claim
166 words
An impedance conversion amplifier that is effective to suppress ripple and other extraneous signals from a power supply comprising: first and second field-effect transistors (FETs) each having gate, source, and drain electrodes; input means for applying an A.C. input signal to the gate of the first FET, the input means including a very high impedance input resistor connected from the gate of the first FET to the reference potential; a load resistor connecting the source of the first FET to a reference potential; connector means connecting the drain and source of the first FET to the source and gate, respectively, of the second FET; and means for connecting the drain of the second FET to a low voltage power supply; whereby the first FET affords the functions of impedance conversion and gate bias for the second FET and the second FET provides a relatively constant operating voltage for the first FET, driving the drain of the first FET to near the A.C. potential of its gate.
Claim 3
Dependent Claim
27 words
An impedance conversion amplifier according to claim 1 in which the input resistor is in the gigaohm range and the load resistor is in the kilohm range.
Claim 4
Dependent Claim
15 words
An impedance conversion amplifier according to claim 2 in which the reference potential is ground.
Claim 5
Dependent Claim
18 words
An impedance conversion amplifier according to claim 1 in which both FETs are formed on one semi-conductor base.
Claim 6
Dependent Claim
61 words
An impedance conversion amplifier according to claim 1 and further comprising: a third FET having gate, source, and drain electrodes; means interconnecting the gate and drain electrodes, respectively, of the second and third FETs; and a load resistor connecting the source of the third FET to the reference potential; whereby the third FET affords a further impedance reduction for the amplifier.
Claim 7
Dependent Claim
32 words
An impedance conversion amplifier according to claim 5 in which the input means includes a very high impedance input resistor connected from the gate of the first FET to the reference potential.
Claim 8
Dependent Claim
29 words
An impedance conversion amplifier according to claim 6 in which the input resistor is in the gigaohm range and each of the load resistors is in the kilohm range.
Claim 9
Dependent Claim
15 words
An impedance conversion amplifier according to claim 7 in which the reference potential is ground.
Claim 10
Dependent Claim
23 words
An impedance conversion amplifier according to claim 5 in which the second and third FETs comprise a single FET having two source electrodes
Claim 11
Dependent Claim
18 words
An impedance conversion amplifier according to claim 5 in which all FETs are formed on one semi-conductor base.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-01-20 | 1995-07-22 | 1996-01-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-01-20 | 1999-07-22 | 2000-01-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-01-20 | 2003-07-22 | 2004-01-21 | $7700.00 | Window Closed / Lapsed |