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Method for the production of a semiconductor device

Assignee: Sharp Corp
•
Filing: 1989-01-23
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Granted: 1992-01-07
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Expires: 2009-01-23
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Abstract

Abstract A method for the production of a semiconductor device in which wiring is formed in three dimensions by the use of interlevel insulators having a flat surface, which method comprises the steps of: applying first insulation material and hardening by heat treatment to form an insulating film made of the first material; etching the insulating film made of the first material in such a manner that only concave portions of an underlying layer are filled with an insulator made of the first material; and forming an insulating film made of a second material thereon, wherein the interlevel insulator is formed by repeating the steps for at least two times so as to have a plurality of the insulators made of the first material which are separated by the insulating films made of the second material.

Inventors

  • 👤 Masato Kawai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 18:48
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/42; H10W20/45; H10W20/47

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 132 words
A method for the production of a semiconductor device in which wiring is formed in three dimensions by the use of an interlevel insulator, which method comprises the steps of: applying first insulation material and hardening by heat treatment to form an insulating film made of the first material; etching said insulating film made of the first material in such a manner that only concave portions of an underlying layer are filled with an insulator made of the first material; and forming an insulating film made of a second material therein, wherein said interlevel insulator is formed by repeating said steps for at least two times so as to have a plurality of said insulators made of the first material which are separated by said insulating films made of the second material.
Claim 2
Independent Claim 132 words
A method for the production of a semiconductor device in which wiring is formed in three dimensions by the use of an interlevel insulator, which method comprises the steps of: applying first insulation material and hardening by heat treatment to form an insulating film made of the first material; etching said insulating film made of the first material in such a manner that only concave portions of an underlying layer are filled with an insulator made of the first material; and forming an insulating film made of a second material therein, wherein said interlevel insulator is formed by repeating said steps for at least two times so as to have a plurality of said insulators made of the first material which are separated by said insulating films made of the second material.
Claim 3
Dependent Claim 21 words
A method for the production of a semiconductor device according to claim 1, wherein said first material is organic silanol glass.
Claim 4
Dependent Claim 28 words
A method for the production of a semiconductor device according to claim 1, wherein said insulating film made of the second material is formed by chemical vapor deposition.

References Cited (Backward Citations)

US4654113A Cited
US4545852A Cited
JPS61272949A Cited
US4826786A Cited
US4775550A Cited
US4676867A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-01-06 1995-07-08 1996-01-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-01-06 1999-07-08 2000-01-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-01-06 2003-07-08 2004-01-07 $7700.00 Window Closed / Lapsed

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