US5079182A
Expired / Lapsed
US
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Bicmos device having self-aligned well tap and method of fabrication
Assignee: National Semiconductor Corp
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Filing: 1990-04-02
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Granted: 1992-01-07
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Expires: 2010-04-02
Abstract
Abstract A well tap for a field effect device formed using a single polysilicon process and a silicide layer is provided. The polysilicon layer which makes contact to the well is doped the same way as the well but is doped opposite of the source or drain. The silicide layer is formed on the upper and sidewall surfaces of the source or drain, well tap, and gate contacts for a field effect device. The silicide layer extends from the sidewall silicide across the upper surface of the transistors and up to the sidewall oxide of the transistor gates. The structure makes it possible to eliminate laterally-spaced separate well taps used in previous devices. Elimination of the laterally-spaced well taps permits hgher packing density, and lowers buried layer-to-substrate capacitance.
Inventors
- 👤 Vida Ilderem
- 👤 Steven M. Leibiger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:39
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/853; H10W20/064; H10W20/066; H10W20/40; H10W20/495; H10D30/00; H10D30/01; H10D30/021; H10D30/0212
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
257 words
In a substrate having a channel region of a first conductivity type and source and drain regions with upper surfaces, formed in a doped well region of said first conductivity type, with said channel region separated from a doped polysilicon gate by an oxide layer, said polysilicon gate having at least one sidewall surface and an upper surface, said source, drain, and gate defining a first field effect device, at least one of said source and drain regions overlain by a first doped polysilicon region of said first conductivity type having upper and sidewall surface, a method for forming a combination well tap and source/drain contact for said field effect device, comprising: forming a connective region of said first conductivity type in said substrate adjacent said one of said source and drain regions said connective region also being adjacent a portion of said first doped polysilicon region, said connective region providing a portion of a substantially conductive path between said well region and said first doped polysilicon region to configure said first polysilicon region as a well tap; and forming metal silicide on at least said upper surface and at least a sidewall surface of said first polysilicon region and at least a portion of said upper surface of said one of said source and drain regions, said silicide layer forming a substantially conductive path between said one of said source and drain regions and said first polysilicon region to configure said first polysilicon region as a contact for said one of said source and drain regions.
Claim 2
Dependent Claim
257 words
In a substrate having a channel region of a first conductivity type and source and drain regions with upper surfaces, formed in a doped well region of said first conductivity type, with said channel region separated from a doped polysilicon gate by an oxide layer, said polysilicon gate having at least one sidewall surface and an upper surface, said source, drain, and gate defining a first field effect device, at least one of said source and drain regions overlain by a first doped polysilicon region of said first conductivity type having upper and sidewall surface, a method for forming a combination well tap and source/drain contact for said field effect device, comprising: forming a connective region of said first conductivity type in said substrate adjacent said one of said source and drain regions said connective region also being adjacent a portion of said first doped polysilicon region, said connective region providing a portion of a substantially conductive path between said well region and said first doped polysilicon region to configure said first polysilicon region as a well tap; and forming metal silicide on at least said upper surface and at least a sidewall surface of said first polysilicon region and at least a portion of said upper surface of said one of said source and drain regions, said silicide layer forming a substantially conductive path between said one of said source and drain regions and said first polysilicon region to configure said first polysilicon region as a contact for said one of said source and drain regions.
Claim 3
Dependent Claim
28 words
A method, as claimed in claim 1, wherein said one of said source and drain regions is of a second conductivity type different from said first conductivity type.
Claim 4
Dependent Claim
72 words
A method, as claimed in claim 1, wherein said first polysilicon region contacts one of a source and drain of a second filed effect device, said one of said source and drain having said first conductivity type and wherein said step of forming metal silicide further comprises: forming metal silicide on a portion of the upper surface of said one of said source and drain regions of said second field effect device.
Claim 5
Dependent Claim
18 words
A method, as claimed in claim 1, further comprising selectively positioning oxide on a sidewall of said gate.
Claim 6
Dependent Claim
63 words
A method, as claimed in claim 4, wherein said step of positioning oxide includes: coating at least a portion of the substrate with said oxide; etching a portion of said oxide coating to leave at least a layer of spacer oxide on a first sidewall of said gate; masking at least said first gate sidewall oxide layer; and etching to remove unmasked oxide.
Claim 7
Dependent Claim
32 words
A method, as claimed in claim 4, wherein said metal silicide layer extends substantially from a sidewall of said first doped polysilicon region to said oxide on one sidewall of said gate.
Claim 8
Dependent Claim
88 words
A method, as claimed in claim 1, wherein said step of forming metal silicide comprises: coating at least said first polysilicon region upper surface and sidewall and a portion of the upper surface of said one of said source and drain regions with a refractory metal; reacting at least a portion of said refractory metal which is adjacent to said first polysilicon region and said one of said source and drain regions with portions of said polysilicon and said substrate; and removing unreacted portions of said refractory metal.
Claim 9
Dependent Claim
33 words
A method, as claimed in claim 7, wherein said step of removing includes contacting said refractory metal with materials selected from the group consisting of H 2 O 2 and NH 3 OH.
Claim 10
Independent Claim
281 words
A method for forming a combined well tap and source/drain contact for a field effect device, comprising: providing a substrate having at least a first isolation well having a first conductivity type; forming doped source and drain regions in said substrate and a channel region, said source and drain regions having of a second conductivity type different from said first conductivity type; positioning a gate oxide layer adjacent a portion of said substrate; forming a layer of polysilicon on a portion of said substrate; doping a first region of said polysilicon to form a gate adjacent said gate oxide layer, said source, gate and drain defining a first field effect device; doping a second region of said polysilicon layer to provide said second region with said first conductivity type; selectively etching portions of said polysilicon layer to define a space between said first and second polysilicon regions, exposing a first region of said substrate, said first region of said substrate being an upper surface of one of said source and drain regions; diffusing doping material from said second polysilicon region into said substrate to form a diffused region, said diffused region providing a portion of a substantially conductive pathway between said second polysilicon region and said isolation well to configure said second polysilicon region as a well tap; and coating portions of said upper and sidewall surfaces of said second polysilicon region and said first substrate region with a metal silicide, said metal silicide forming a substantially conductive path between said second polysilicon region and said one of said source and drain regions to configure said second polysilicon region as a contact for said one of said source and drain regions.
Claim 11
Independent Claim
281 words
A method for forming a combined well tap and source/drain contact for a field effect device, comprising: providing a substrate having at least a first isolation well having a first conductivity type; forming doped source and drain regions in said substrate and a channel region, said source and drain regions having of a second conductivity type different from said first conductivity type; positioning a gate oxide layer adjacent a portion of said substrate; forming a layer of polysilicon on a portion of said substrate; doping a first region of said polysilicon to form a gate adjacent said gate oxide layer, said source, gate and drain defining a first field effect device; doping a second region of said polysilicon layer to provide said second region with said first conductivity type; selectively etching portions of said polysilicon layer to define a space between said first and second polysilicon regions, exposing a first region of said substrate, said first region of said substrate being an upper surface of one of said source and drain regions; diffusing doping material from said second polysilicon region into said substrate to form a diffused region, said diffused region providing a portion of a substantially conductive pathway between said second polysilicon region and said isolation well to configure said second polysilicon region as a well tap; and coating portions of said upper and sidewall surfaces of said second polysilicon region and said first substrate region with a metal silicide, said metal silicide forming a substantially conductive path between said second polysilicon region and said one of said source and drain regions to configure said second polysilicon region as a contact for said one of said source and drain regions.
Claim 12
Dependent Claim
75 words
A method, as claimed in claim 9, wherein said second region contacts one of a source and drain of a second field effect device, said one of said source and drain of said second field effect device having said first conductivity type, and wherein said step of coating further comprises: coating a portion of the upper surface of said one of said source and drain regions of said second field effect device with metal silicide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-01-06 | 1995-07-08 | 1996-01-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-01-06 | 1999-07-08 | 2000-01-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-01-06 | 2003-07-08 | 2004-01-07 | $7700.00 | Window Closed / Lapsed |