Neural network exhibiting improved tolerance to temperature and power supply variations

Claim 2

In an analog associative network which includes a plurality of synapse cells providing a weighted connection between a plurality of inputs and a plurality of neural summing devices, said neural summing devices generating a sum-of-products of said inputs and the weights stored within said synapse cells, an improvement for reducing the sensitivity of said network to temperature and power supply variations comprising: a first circuit means for generating a first compensating signal input along a first input line coupled to said network, said first signal exhibiting a dependence on temperature which corresponds to said temperature variation; and means for setting the weights associated with the synapse cells coupling said first input line to said neural summing devices such that the sensitivity of said network to said temperature variation is reduced by the product of said first signal and said first weight.

Claim 3

The improvement of claim 1 further comprising a method for the setting of said weights which comprises the steps of: applying an input pattern to said network, said patterning including predetermined power supply voltage and temperature components; repeatedly applying said pattern to said network, but each time varying said predetermined power supply and temperature components such that said network is trained to recognize that temperature and power supply are not distinguishing features of said pattern.

Claim 4

In an analog associative network which includes a plurality of synapse cells providing a weighted connection between a plurality of inputs and a plurality of neural summing devices, said neural summing devices generating a sum-of-products of said inputs and the weights stored within said synapse cells, an improvement for reducing the sensitivity of said network to temperature and power supply variations comprising: a first circuit means for generating a first compensating signal input along a first input line coupled to said network, said first signal exhibiting a dependence on a power supply which corresponds to said power supply variation; and means for setting the weights associated with the synapse cells coupling said first input line to said neural summing devices such that the sensitivity of said network to said temperature variation is reduced by the product of said first signal and said first weight.

Claim 5

In an analog associative network which includes a plurality of synapse cells providing a weighted connection between a plurality of inputs and a plurality of neural summing devices, said neural summing devices generating a sum-of-products of said inputs and the weights stored within said synapse cells, an improvement for reducing the sensitivity of said network to temperature and power supply variations comprising: a first circuit means for generating a first compensating signal input along a first input line coupled to said network, said first signal exhibiting a dependence on a power supply which corresponds to said power supply variation; and means for setting the weights associated with the synapse cells coupling said first input line to said neural summing devices such that the sensitivity of said network to said temperature variation is reduced by the product of said first signal and said first weight.

Claim 6

The improvement of claim 3 further comprising: a second circuit means for generating a second compensating signal input along a second input line coupled to said network, said second signal exhibiting a dependence on temperature which corresponds to said temperature variation; and a means for setting the weights associated with the synapse cells coupling said second input line to said neural summing devices such that sensitivity of said network to said temperature variations is reduced.

Claim 7

The improvement of claim 4 wherein said first circuit means and said second circuit means are fabricated on the same silicon substrate.

Claim 8

The improvement of claim 5 further comprising a method for the setting of said weights which comprises the steps of: applying an input pattern to said network, said patterning including predetermined power supply voltage and temperature components; repeatedly applying said pattern to said network, but each time varying said predetermined power supply and temperature components such that said network is trained to recognize that temperature and power supply are not distinguishing features of said pattern.

Claim 9

In an analog neural network capable of calculating the sum-of-products of an input pattern and a stored weight, said pattern being applied to a plurality of input voltage lines coupled to a plurality of output summing lines through a plurality of synapse cells, said synapse cells collectively storing said weight, and wherein said output summing lines are coupled to a corresponding plurality of neural summing devices for calculating said sum-of-products, a method of reducing the sensitivity of said network to temperature and power supply variations comprising the steps of: generating a first signal which exhibits a temperature dependence corresponding to said temperature variation; generating a second signal which exhibits a power supply dependence corresponding to said power supply variation; setting a predetermined weight in the synapse cells associated with a first and a second input voltage line selected from said plurality of input voltage lines, said predetermined weight being related to said temperature and power supply dependence such that when said first signal is applied to said first input voltage line a first sum-of-product term is produced which counteracts said temperature variation, and when said second signal is applied to said second input voltage line a second sum-of-product term is produced which counteracts said power supply variation; and applying said first and second signals to said network along said first and second input voltage lines, respectively, as components of said pattern.

Claim 10

In an analog neural network capable of calculating the sum-of-products of an input pattern and a stored weight, said pattern being applied to a plurality of input voltage lines coupled to a plurality of output summing lines through a plurality of synapse cells, said synapse cells collectively storing said weight, and wherein said output summing lines are coupled to a corresponding plurality of neural summing devices for calculating said sum-of-products, a method of reducing the sensitivity of said network to temperature and power supply variations comprising the steps of: generating a first signal which exhibits a temperature dependence corresponding to said temperature variation; generating a second signal which exhibits a power supply dependence corresponding to said power supply variation; setting a predetermined weight in the synapse cells associated with a first and a second input voltage line selected from said plurality of input voltage lines, said predetermined weight being related to said temperature and power supply dependence such that when said first signal is applied to said first input voltage line a first sum-of-product term is produced which counteracts said temperature variation, and when said second signal is applied to said second input voltage line a second sum-of-product term is produced which counteracts said power supply variation; and applying said first and second signals to said network along said first and second input voltage lines, respectively, as components of said pattern.

Claim 11

The method of claim 7 further comprising the step utilizing a learning algorithm to train said network to recognize that temperature and power supply are not distinguishing features of said pattern.

Claim 12

The method according to claim 8 wherein said utilizing step comprises the step of repeatedly applying said pattern to said network, but each time varying the power supply voltage and temperature.

Claim 13

In an analog associative network including a plurality of input voltage lines for receiving an input pattern comprising inputs u 1 -u i ; a plurality of synapse cells providing a weighted connection between said input voltage lines and j neural summing devices, each of said cells storing a weight W ij such that neural summing devices collectively produce an output approximately equal to the equation: Sigmoid(Σu.sub.i W.sub.ij +αTΣu.sub.i W.sub.ij +β(PS)Σu.sub.i W.sub.ij) where the terms αTΣu i W ij and β(PS) Σu i W ij represent the sensitivity of said network to temperature (T) and power supply (PS) variations; an improvement for reducing said sensitivity comprising: a first circuit means for generating an input u T applied along one of said input lines; a second circuit means for generating an input u PS applied to said network along another of said input lines; a means for storing weights W T and W PS in the synapse cells associated with said one and said another of said input lines, respectively, such that the product u T W T is approximately equal to -αTΣu i W ij and the product u PS W PS is approximately equal to -β(PS)Σu i W ij , thereby effectively nullifying said temperature and power supply variations.

Claim 14

In an analog associative network including a plurality of input voltage lines for receiving an input pattern comprising inputs u 1 -u i ; a plurality of synapse cells providing a weighted connection between said input voltage lines and j neural summing devices, each of said cells storing a weight W ij such that neural summing devices collectively produce an output approximately equal to the equation: Sigmoid(Σu.sub.i W.sub.ij +αTΣu.sub.i W.sub.ij +β(PS)Σu.sub.i W.sub.ij) where the terms αTΣu i W ij and β(PS) Σu i W ij represent the sensitivity of said network to temperature (T) and power supply (PS) variations; an improvement for reducing said sensitivity comprising: a first circuit means for generating an input u T applied along one of said input lines; a second circuit means for generating an input u PS applied to said network along another of said input lines; a means for storing weights W T and W PS in the synapse cells associated with said one and said another of said input lines, respectively, such that the product u T W T is approximately equal to -αTΣu i W ij and the product u PS W PS is approximately equal to -β(PS)Σu i W ij , thereby effectively nullifying said temperature and power supply variations.