US5073716A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus comprising an electrostatic wafer cassette
Assignee: AT&T Inc
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Filing: 1990-12-12
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Granted: 1991-12-17
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Expires: 2010-12-12
Abstract
Abstract Disclosed is apparatus comprising an electrostatic cassette assembly for securing a semiconductor wafer during lithographic processing such as direct-write particle-beam lithography. The cassette assembly comprises a cassette body and an electrostatic chuck installable in, and removeable from, the cassette body. The electrostatic chuck comprises a charge plate having a thin dielectric layer on its upper surface, against which the wafer is flattened by Coulombic force. Charge storage means are included for maintaining an electrical potential difference between the wafer and the charge plate even in the absence of connection to a source of electrical energy external to the assembly.
Inventors
- 👤 James T. Clemens
- 👤 Shane Y. Hong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 20:32
CPC Classifications
H; H10; H10P; H10P72/00; H10P72/70; H10P72/72; H10P72/722; H01; H01J; H01J37/00; H01J37/02; H01J37/20; H10P72/10; H10P72/19; H10P72/1922
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
162 words
A method for manufacturing an article, comprising the steps of: providing a semiconductor wafer having first and second major surfaces and a processing layer overlying at least a portion of the first surface; providing means for securing the wafer, the securing means including a charge plate; electrostatically flattening the wafer against the charge plate; exposing the processing layer to actinic radiation; and performing at least one additional step toward completion of the article, CHARACTERIZED IN THAT the securing means further comprise means for storing an electrical charge, the charge storage means being adapted to maintain an electrical potential difference, without connection to a source of electrical energy external to the securing means, for a period of time that is longer than an average exposure time associated with said exposing step; and the flattening step comprises the steps of creating an electrical potential difference between the wafer and the charge plate, and maintaining the potential difference by means of the charge storage means.
Claim 2
Independent Claim
162 words
A method for manufacturing an article, comprising the steps of: providing a semiconductor wafer having first and second major surfaces and a processing layer overlying at least a portion of the first surface; providing means for securing the wafer, the securing means including a charge plate; electrostatically flattening the wafer against the charge plate; exposing the processing layer to actinic radiation; and performing at least one additional step toward completion of the article, CHARACTERIZED IN THAT the securing means further comprise means for storing an electrical charge, the charge storage means being adapted to maintain an electrical potential difference, without connection to a source of electrical energy external to the securing means, for a period of time that is longer than an average exposure time associated with said exposing step; and the flattening step comprises the steps of creating an electrical potential difference between the wafer and the charge plate, and maintaining the potential difference by means of the charge storage means.
Claim 3
Dependent Claim
16 words
The method of claim 1, wherein the charge storage means comprise at least one electrical battery.
Claim 4
Dependent Claim
25 words
The method of claim 1, wherein the charge storage means comprise at least one electrical capacitor, and the flattening step further comprises charging the capacitor.
Claim 5
Dependent Claim
45 words
The method of claim 1, wherein the charge storage means have first and second terminals of opposite polarity, the first terminal is capable of being electrically connected to the charge plate, and the flattening step further comprises electrically connecting the second terminal to the wafer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-12-16 | 1995-06-17 | 1995-12-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-12-16 | 1999-06-17 | 1999-12-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-12-16 | 2003-06-17 | 2003-12-17 | $7700.00 | Window Closed / Lapsed |