Patent US5072268A successfully refreshed from Google Patents.
US5072268A
Expired / Lapsed
US
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MOS gated bipolar transistor
Assignee: Power Integrations Inc
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Filing: 1991-03-12
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Granted: 1991-12-10
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Expires: 2011-03-12
Abstract
Abstract A high voltage transistor includes a substrate of a first conductivity type. Within the substrate is a well region of a second conductivity type. A source region is within the substrate and adjoins the substrate surface. The source region includes a pocket of semiconductor material of the first conductivity type and a pocket of semiconductor material of the second conductivity type. A drain region is placed within the well region and adjoins the substrate surface. The drain region includes a pocket of semiconductor material of the first conductivity type and a pocket of semiconductor material of the second conductivity type. A source contact is electrically connected to the source region. A drain contact is electrically connected to the drain region. A top region of the first conductivity type is within the well region separate from the drain region and extends laterally from the drain region toward the source region. An insulating layer is deposited on the substrate covering a channel region between the top region and the source region and covering at least a portion of the source region and the top region. A gate electrode is placed on the insulating region electrically isolated from the substrate.
Inventors
- 👤 Vladimir Rumennik
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 20:59
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/411
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
205 words
A high voltage transistor comprising: a substrate of a first conductivity type having a surface; a well region of a second conductivity type within the substrate; a source region within the substrate and adjoining the substrate surface, the source region including a pocket of semiconductor material of the first conductivity type and a pocket of semiconductor material of the second conductivity type; a drain region within the well region and adjoining the substrate surface, the drain region including a pocket of semiconductor material of the first conductivity type and a pocket of semiconductor material of the second conductivity type; a source contact electrically connected to the source region; a drain contact electrically connected to the drain region; a top region of the first conductivity type within the well region separate from the drain region, connected to ground, and extending laterally from the drain region toward the source region; an insulating layer deposited on the substrate covering a channel region between the top region and the source region and covering at least a portion of the source region and the top region; and, a gate electrode on the insulating region electrically isolated from the substrate, the gate electrode controlling by field-effect current flow in the channel.
Claim 2
Dependent Claim
205 words
A high voltage transistor comprising: a substrate of a first conductivity type having a surface; a well region of a second conductivity type within the substrate; a source region within the substrate and adjoining the substrate surface, the source region including a pocket of semiconductor material of the first conductivity type and a pocket of semiconductor material of the second conductivity type; a drain region within the well region and adjoining the substrate surface, the drain region including a pocket of semiconductor material of the first conductivity type and a pocket of semiconductor material of the second conductivity type; a source contact electrically connected to the source region; a drain contact electrically connected to the drain region; a top region of the first conductivity type within the well region separate from the drain region, connected to ground, and extending laterally from the drain region toward the source region; an insulating layer deposited on the substrate covering a channel region between the top region and the source region and covering at least a portion of the source region and the top region; and, a gate electrode on the insulating region electrically isolated from the substrate, the gate electrode controlling by field-effect current flow in the channel.
Claim 3
Dependent Claim
30 words
A high voltage transistor as in claim 1 additionally comprising: a punch through region of the first conductivity type, within the substrate, the punch through region surrounding the source region.
Claim 4
Dependent Claim
22 words
A high voltage transistor as in claim 1 wherein the first conductivity type is p and the second conductivity type is n.
Claim 5
Dependent Claim
19 words
A high voltage transistor as in claim 3 wherein the substrate includes p - material on p + material.
Claim 6
Dependent Claim
25 words
A high voltage transistor as in claim 1 wherein the well region is doped with a dosage greater than 2×10 12 atoms per square centimeter.
Claim 7
Dependent Claim
106 words
A high voltage transistor as in claim 1 wherein within the source region the pocket of semiconductor material of the first conductivity type is a first pocket in a plurality of pockets of semiconductor material of the first conductivity type and the pocket of semiconductor material of a second conductivity type is a first pocket in a plurality of pockets of semiconductor material of the second conductivity type, and wherein within the source region pockets from the plurality of pockets of semiconductor material of the first conductivity type are placed alternating with pockets from the plurality of pockets of semiconductor material of the second conductivity type.
Claim 8
Dependent Claim
37 words
A high voltage transistor as in claim 1 wherein in the drain region the pocket of semiconductor material of the first conductivity type is laterally separate from the pocket of semiconductor material of the second conductivity type.
Claim 9
Dependent Claim
52 words
A high voltage transistor as in claim 1 wherein during operation of the high voltage transistor, current conduction is predominantly bipolar with current flowing between the drain contact and ground by way of the pocket of semiconductor material of the first conductivity type in the drain, the well region, and the substrate.
Claim 10
Dependent Claim
60 words
A high voltage transistor as in claim 8 wherein during operation of the high voltage transistor current also flows between the source contact and the drain contact by way of the pocket of semiconductor material of the first conductivity type in the drain, the well region, and the pocket of semiconductor material of the first conductivity type in the source.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-12-09 | 1995-06-10 | 1995-12-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-12-09 | 1999-06-10 | 1999-12-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-12-09 | 2003-06-10 | 2003-12-10 | $7700.00 | Window Closed / Lapsed |