Patent US5072131A successfully refreshed from Google Patents.
US5072131A
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US
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Circuit for detecting address signal transition
Assignee: Panasonic Holdings Corp
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Filing: 1990-10-12
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Granted: 1991-12-10
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Expires: 2010-10-12
Abstract
Abstract A first device serves to sense a start of a transition of an address signal and to generate a transition start signal representative thereof. The first device has a first predetermined input switching voltage with respect to the address signal. A second device serves to sense an end of a transition of the address signal and to generate a transition end signal representative thereof. The second device has a second predetermined input switching voltage with respect to the address signal. The first and second predetermined input switching voltages are positively different from each other.
Inventors
- 👤 Takeshi Nakano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 20:35
CPC Classifications
G; G11; G11C; G11C8/00; G11C8/18
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
147 words
A circuit for detecting a transition of an address signal, comprising: an address signal input line subjected to the address signal; a first circuit group having first, second, and third inverters, and a first delay circuit successively connected in series to the address signal input line; and a second circuit group having fourth and fifth inverters, and a second delay circuit successively connected in series to the address signal input line; wherein the first and fifth inverters output signals each representing a start of a transition of the address signal, and the first and second delay circuits output signals each representing an end of a transition of the address signal, and wherein the first and fourth inverters have first and second predetermined input switching voltages with respect to the address signal respectively, and the first and second predetermined input switching voltages are positively different from each other.
Claim 2
Dependent Claim
147 words
A circuit for detecting a transition of an address signal, comprising: an address signal input line subjected to the address signal; a first circuit group having first, second, and third inverters, and a first delay circuit successively connected in series to the address signal input line; and a second circuit group having fourth and fifth inverters, and a second delay circuit successively connected in series to the address signal input line; wherein the first and fifth inverters output signals each representing a start of a transition of the address signal, and the first and second delay circuits output signals each representing an end of a transition of the address signal, and wherein the first and fourth inverters have first and second predetermined input switching voltages with respect to the address signal respectively, and the first and second predetermined input switching voltages are positively different from each other.
Claim 3
Dependent Claim
186 words
A circuit for detecting a transition of an address signal, comprising: an address signal input line subjected to the address signal; a first circuit group having first, second, and third inverters, and a first delay circuit successively connected in series to the address signal input line; a second circuit group having fourth and fifth inverters, and a second delay circuit successively connected in series to the address signal input line; and an address selector having a sixth inverter and a selection circuit successively connected in series to the address signal input line; wherein the first and fifth inverters output signals each representing a start of a transition of the address signal, and the first and second delay circuits output signals each representing an end of a transition of the address signal, and wherein the first, fourth, and sixth inverters have first, second, and third predetermined input switching voltages with respect to the address signal respectively, and the first, second, and third input switching voltages are positively different from each other and the third input switching voltage lies between the first and second predetermined input switching voltages.
Claim 4
Dependent Claim
186 words
A circuit for detecting a transition of an address signal, comprising: an address signal input line subjected to the address signal; a first circuit group having first, second, and third inverters, and a first delay circuit successively connected in series to the address signal input line; a second circuit group having fourth and fifth inverters, and a second delay circuit successively connected in series to the address signal input line; and an address selector having a sixth inverter and a selection circuit successively connected in series to the address signal input line; wherein the first and fifth inverters output signals each representing a start of a transition of the address signal, and the first and second delay circuits output signals each representing an end of a transition of the address signal, and wherein the first, fourth, and sixth inverters have first, second, and third predetermined input switching voltages with respect to the address signal respectively, and the first, second, and third input switching voltages are positively different from each other and the third input switching voltage lies between the first and second predetermined input switching voltages.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-12-09 | 1995-06-10 | 1995-12-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-12-09 | 1999-06-10 | 1999-12-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-12-09 | 2003-06-10 | 2003-12-10 | $7700.00 | Window Closed / Lapsed |