US5068550A
Expired / Lapsed
US
⏱️ 0.0 years remaining
ECL-TTL signal level converter
Assignee: Siemens AG
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Filing: 1990-10-09
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Granted: 1991-11-26
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Expires: 2010-10-09
Abstract
Abstract An ECL-TTL signal level converter includes a first transistor pair having transistors controlled by ECL signals. A second transistor pair is connected to the transistors of the first transistor pair. Collector resistors are connected between the transistors of the second transistor pair and a first supply potential. A third transistor pair has transistors connected to the transistors of the first transistor pair. A fourth transistor pair has transistors connected to the transistors of the first transistor pair and to the transistors of the third transistor pair. A current impressing device is connected between the transistors of the fourth transistor pair and a second supply potential. A push-pull output stage is connected to the transistors of the second transistor pair for the emission of a TTL signal.
Inventors
- 👤 Claude Barre
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 07:23
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0175; H03K19/018; H03K19/01806; H03K19/01; H03K19/013; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/288; H03K3/2885
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
279 words
ECL-TTL signal level converter, comprising: a first transistor pair having transistors with bases controlled by ECL signals, collectors and coupled emitters; a second transistor pair having coupled bases connected to a ground potential, emitters each being connected to a respective one of the collectors of said transistors of said first transistor pair, and collectors; collector resistors each being connected between a respective one of the collectors of said transistors of said second transistor pair and a first supply potential; a third transistor pair having transistors with coupled emitters, bases and collectors, the base of one of said transistors and the collector of the other of said transistors of said third transistor pair being connected to the collector of one of said transistors of said first transistor pair, and the collector of said one transistor and the base of said other transistor of said third transistor pair being connected to the collector of the other of said transistors of said first transistor pair; a fourth transistor pair having transistors with bases controlled by control signals, coupled emitters and collectors, the collector of one of said transistors of said fourth transistor pair being connected to the coupled emitters of said transistors of said first transistor pair, and the collector of the other of said transistors of said fourth transistor pair being connected to the coupled emitters of said transistors of said third transistor pair; current impressing means connected in common between the coupled emitters of said transistors of said fourth transistor pair and a second supply potential; and a push-pull output stage connected to the collectors of said transistors of said second transistor pair for the emission of a TTL signal.
Claim 2
Dependent Claim
279 words
ECL-TTL signal level converter, comprising: a first transistor pair having transistors with bases controlled by ECL signals, collectors and coupled emitters; a second transistor pair having coupled bases connected to a ground potential, emitters each being connected to a respective one of the collectors of said transistors of said first transistor pair, and collectors; collector resistors each being connected between a respective one of the collectors of said transistors of said second transistor pair and a first supply potential; a third transistor pair having transistors with coupled emitters, bases and collectors, the base of one of said transistors and the collector of the other of said transistors of said third transistor pair being connected to the collector of one of said transistors of said first transistor pair, and the collector of said one transistor and the base of said other transistor of said third transistor pair being connected to the collector of the other of said transistors of said first transistor pair; a fourth transistor pair having transistors with bases controlled by control signals, coupled emitters and collectors, the collector of one of said transistors of said fourth transistor pair being connected to the coupled emitters of said transistors of said first transistor pair, and the collector of the other of said transistors of said fourth transistor pair being connected to the coupled emitters of said transistors of said third transistor pair; current impressing means connected in common between the coupled emitters of said transistors of said fourth transistor pair and a second supply potential; and a push-pull output stage connected to the collectors of said transistors of said second transistor pair for the emission of a TTL signal.
Claim 3
Dependent Claim
25 words
ECL-TTL signal level converter according to claim 1, including emitter resistors connected upstream of the emitters of said transistors of said second pair of transistors.
Claim 4
Dependent Claim
249 words
ECL-TTL signal level converter according to claim 1, including a first transistor of said current impressing means having a collector connected to the coupled emitters of said transistors of said fourth transistor pair, an emitter and a base; first and second resistors each being connected between a respective one of the emitter and the base of said first transistor and the second supply potential; a second transistor having an emitter connected to the base of said first transistor, a collector connected to the ground potential and a base; a third resistor connected between the base of said second transistor and the first supply potential, two diodes and a fourth resistor connected in series between the base of said second transistor and the second supply potential, a third transistor having a base and a collector-to-emitter path, a fifth resistor connected in series with the collector-to-emitter path of said third transistor between the base of said second transistor and the second supply potential; a series circuit of a given number of diodes and a sixth resistor connected between the base of said third transistor and ground potential, another series circuit of a predetermined number of diodes and a seventh resistor connected between the base of said third transistor and the second supply potential; and the product of the resistances of said third and said seventh resistors being equal to the product of the resistance of said fifth resistor and the sum of the resistances of said sixth and said seventh resistors.
Claim 5
Dependent Claim
20 words
ECL-TTL signal level converter according to claim 3, wherein said given number is three, and said predetermined number is two.
References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-11-25 | 1995-05-27 | 1995-11-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-25 | 1999-05-27 | 1999-11-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-25 | 2003-05-27 | 2003-11-26 | $7700.00 | Window Closed / Lapsed |