Patent US5060036A successfully refreshed from Google Patents.
US5060036A
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Thin film transistor of active matrix liquid crystal display
Assignee: Samsung SDI Co Ltd
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Filing: 1989-12-28
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Granted: 1991-10-22
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Expires: 2009-12-28
Abstract
Abstract A thin film transistor of active matrix LCD comprising amorphous silicon layer formed on gate insulating layer and doped with phosphorous or boron, and insulating layer having two laminated structure and SiN layer formed between said two amorphous silicon layers so as to enhance characteristics of the TFT and protect short circuit in the cross points between the gate and source electrodes.
Inventors
- 👤 Kwangsu Choi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:01
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/6748; H10D30/6729; H10D30/6737; H10D30/6739
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
120 words
A thin film transistor used in active matrix liquid crystal display comprising: two laminated SiO 2 insulating layers, a second layer of SiO 2 being disposed on top of a first layer of SiO 2 , electrically isolating a gate electrode from a source electrode and preventing short circuiting therebetween and said second layer of SiO 2 providing insulation from pinholes in said first layer of SiO 2 ; a semiconductor layer formed of two laminated amorphous silicon layers formed on the SiO 2 insulating layer and a layer of SiN of predetermined thickness formed between said two amorphous silicon layers to protect against leakage current and short circuiting in cross points between the gate electrode and the source electrode.
Claim 2
Dependent Claim
120 words
A thin film transistor used in active matrix liquid crystal display comprising: two laminated SiO 2 insulating layers, a second layer of SiO 2 being disposed on top of a first layer of SiO 2 , electrically isolating a gate electrode from a source electrode and preventing short circuiting therebetween and said second layer of SiO 2 providing insulation from pinholes in said first layer of SiO 2 ; a semiconductor layer formed of two laminated amorphous silicon layers formed on the SiO 2 insulating layer and a layer of SiN of predetermined thickness formed between said two amorphous silicon layers to protect against leakage current and short circuiting in cross points between the gate electrode and the source electrode.
Claim 3
Dependent Claim
27 words
A thin film transistor of active matrix liquid crystal display as claimed in claim 1 in which said SiN layer is of less than 100 Å thickness.
Claim 4
Dependent Claim
39 words
A thin film transistor of active matrix liquid crystal display as claimed in claim 1 in which said amorphous silicon layers are doped with at least one of a group consisting of phosphorus and boron at the predetermined rate.
Claim 5
Dependent Claim
45 words
A thin film transistor of active matrix liquid crystal display as claimed in claim 3 in which said at least one of a group consisting of phosphorus and boron is doped in said amorphous silicon layers in an amount ranging from 0.1 to 1 PPM.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-10-21 | 1995-04-22 | 1995-10-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-10-21 | 1999-04-22 | 1999-10-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-10-21 | 2003-04-22 | 2003-10-22 | $7700.00 | Window Closed / Lapsed |