US5060029A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Step cut type insulated gate SIT having low-resistance electrode and method of manufacturing the same
Assignee: Tohoku University
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Filing: 1990-02-23
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Granted: 1991-10-22
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Expires: 2010-02-23
Abstract
Abstract This invention provides a step cut type insulated gate static induction tsistor having a first main electrode formed in one major surface of a semiconductor substrate, a second main electrode formed in a bottom portion of a U-shaped groove formed in one major surface of a semiconductor substrate, a control electrode formed on a side wall of the U-shaped groove and consisting of a thin insulating film and a polysilicon layer, and a low-resistance electrode of a refractory metal layer or a refractory metal silicide layer formed in at least part of the side wall of the polysilicon layer of the control electrode.
Inventors
- 👤 Jun-ichi Nishizawa
- 👤 Nobuo Takeda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:07
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/012; H10D30/202; H10D30/60; H10D30/63; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/0131; H10D64/01326; H10D64/0133; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/663
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
113 words
A step cut type insulated gate static induction transistor, comprising: at least one U-shaped groove formed in one major surface of a semiconductor substrate; a drain region of a first conductivity type, having high impurity concentration and formed in said one major surface; a source region of the first conductivity type, having high impurity concentration and formed in said U-shaped groove; a gate electrode formed only on a side wall of said U-shaped groove and including a thin insulating film and a polysilicon layer; and a first low-resistance electrode made of one of refractory metal and refractory metal silicide and formed on an upper portion of a side wall of said polysilicon layer.
Claim 2
Dependent Claim
113 words
A step cut type insulated gate static induction transistor, comprising: at least one U-shaped groove formed in one major surface of a semiconductor substrate; a drain region of a first conductivity type, having high impurity concentration and formed in said one major surface; a source region of the first conductivity type, having high impurity concentration and formed in said U-shaped groove; a gate electrode formed only on a side wall of said U-shaped groove and including a thin insulating film and a polysilicon layer; and a first low-resistance electrode made of one of refractory metal and refractory metal silicide and formed on an upper portion of a side wall of said polysilicon layer.
Claim 3
Dependent Claim
36 words
A transistor according to claim 1, further comprising a second low-resistance electrode made of one of refractory metal and refractory metal silicide and formed on at least one of said drain region and said source region.
Claim 4
Dependent Claim
37 words
A transistor according to claim 2, further comprising insulating film spacers formed on upper and lower portions of said side wall of said polysilicon layer, for electrically isolating said first and second low-resistance electrodes from one another.
Claim 5
Dependent Claim
116 words
A step cut type insulated gate static induction transistor, comprising: at least one U-shaped groove formed in one major surface of a semiconductor substrate; a drain region of a first conductivity type, having high impurity concentration and formed in said one major surface; a source region of the first conductivity type, having high impurity concentration and formed in said U-shaped groove; a gate electrode formed only on a side wall of said U-shaped groove and including a thin insulating film and a polysilicon layer; and a low-resistance electrode made of one of a refractory metal and a refractory metal silicide and formed only on both an upper side wall and top portion of said polysilicon layer.
Claim 6
Dependent Claim
116 words
A step cut type insulated gate static induction transistor, comprising: at least one U-shaped groove formed in one major surface of a semiconductor substrate; a drain region of a first conductivity type, having high impurity concentration and formed in said one major surface; a source region of the first conductivity type, having high impurity concentration and formed in said U-shaped groove; a gate electrode formed only on a side wall of said U-shaped groove and including a thin insulating film and a polysilicon layer; and a low-resistance electrode made of one of a refractory metal and a refractory metal silicide and formed only on both an upper side wall and top portion of said polysilicon layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-10-21 | 1995-04-22 | 1995-10-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-10-21 | 1999-04-22 | 1999-10-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-10-21 | 2003-04-22 | 2003-10-22 | $7700.00 | Window Closed / Lapsed |