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US5049970A
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High resistive element
Assignee: Sharp Corp
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Filing: 1990-06-12
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Granted: 1991-09-17
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Expires: 2010-06-12
Abstract
Abstract A high resistive element is provided that constitutes an element of integrated circuits comprising an oxide film formed on a semiconductor substrate and a polysilicon film formed on the oxide film. The high resistive element is prepared by ion injection of silicon ions and conductive impurities in the oxide film through the polysilicon film.
Inventors
- 👤 Kenichi Tanaka
- 👤 Shigeo Onishi
- 👤 Toshiyuki Okumura
- 👤 Keizo Sakiyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 17:40
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/15; Y; Y10; Y10S; Y10S257/00; Y10S257/903; Y10S257/904
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
117 words
A high resistive element that constitutes an element of integrated circuits comprising an oxide film formed on a semiconductor substrate and a polysilicon film formed on said oxide film, said polysilicon film being positioned above an impurity region in said substrate, wherein said high resistive element is prepared in said oxide film at the same time that said impurity region is formed by ion injection of silicon ions and conductive impurities in said substrate through said polysilicon film so that the concentration of silicon and the concentration of conductive impurities are both greatest at the interface between the semiconductor substrate and the oxide film, wherein said high resistive element exhibits a resistance of 1 teraohm or more.
Claim 2
Dependent Claim
117 words
A high resistive element that constitutes an element of integrated circuits comprising an oxide film formed on a semiconductor substrate and a polysilicon film formed on said oxide film, said polysilicon film being positioned above an impurity region in said substrate, wherein said high resistive element is prepared in said oxide film at the same time that said impurity region is formed by ion injection of silicon ions and conductive impurities in said substrate through said polysilicon film so that the concentration of silicon and the concentration of conductive impurities are both greatest at the interface between the semiconductor substrate and the oxide film, wherein said high resistive element exhibits a resistance of 1 teraohm or more.
Claim 3
Dependent Claim
50 words
A high resistive element according to claim 1, wherein said integrated circuit is a static RAM and wherein said high resistive element is connected in series with a MOS transistor formed in said semiconductor substrate under said oxide film, said MOS transistor constituting a memory cell of said static RAM.
Claim 4
Dependent Claim
23 words
A high resistive element according to claim 1, wherein said conductive impurities have a conductivity type opposite to that of said semiconductor substrate.
Claim 5
Dependent Claim
14 words
A high resistive element according to claim 1, wherein said conductive impurities are phosphorus.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-16 | 1995-03-18 | 1995-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-16 | 1999-03-18 | 1999-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-16 | 2003-03-18 | 2003-09-17 | $7700.00 | Window Closed / Lapsed |