Method of partially eliminating the bird's beak effect without adding any process steps

Claim 1

A method of enlarging storage cell active areas in semiconductor circuit devices on a wafer surface, the method comprising: a) depositing a first oxide layer superjacent the wafer surface; b) depositing a dielectric layer superjacent said first oxide layer and patterning said dielectric layer thereby defining locations for said active areas; c) growing field oxide on said first oxide layer not covered by said patterned dielectric layer, growing of said field oxide encroaches under the edges of said patterned dielectric thereby forming field oxide bird's beak; d) applying a photomask to said wafer surface, said photomask having a first opening to expose an area to define a buried contact location and a second opening to expose said storage cell active areas; e) performing a first etching step thereby etching said patterned dielectric and a horizontal portion of said field oxide, said first etching step thereby reducing said field oxide bird's beak primarily in the horizontal direction; f) removing said photomask; g) depositing a polysilicon layer superjacent said wafer surface; h) depositing a second oxide layer superjacent said polysilicon layer; and i) performing a second etching step thereby etching said second oxide layer and said polysilicon layer to form trenches into said storage cell active areas thereby enlarging said storage cell active areas primarily in the vertical direction.

Claim 2

A method of enlarging storage cell active areas in semiconductor circuit devices on a wafer surface, the method comprising: a) depositing a first oxide layer superjacent the wafer surface; b) depositing a dielectric layer superjacent said first oxide layer and patterning said dielectric layer thereby defining locations for said active areas; c) growing field oxide on said first oxide layer not covered by said patterned dielectric layer, growing of said field oxide encroaches under the edges of said patterned dielectric thereby forming field oxide bird's beak; d) applying a photomask to said wafer surface, said photomask having a first opening to expose an area to define a buried contact location and a second opening to expose said storage cell active areas; e) performing a first etching step thereby etching said patterned dielectric and a horizontal portion of said field oxide, said first etching step thereby reducing said field oxide bird's beak primarily in the horizontal direction; f) removing said photomask; g) depositing a polysilicon layer superjacent said wafer surface; h) depositing a second oxide layer superjacent said polysilicon layer; and i) performing a second etching step thereby etching said second oxide layer and said polysilicon layer to form trenches into said storage cell active areas thereby enlarging said storage cell active areas primarily in the vertical direction.

Claim 5

A method of enlarging storage cell active areas in random access memory devices fabricated on a wafer surface, the method comprising: a) depositing a first oxide layer superjacent the wafer surface; b) depositing a dielectric layer superjacent said first oxide layer and patterning said dielectric layer thereby defining locations for said active areas; c) growing field oxide on said first oxide layer not covered by said patterned dielectric layer, growing of said field oxide encroaches under the edges of said patterned dielectric thereby forming field oxide bird's beak; d) applying a photomask to said wafer surface, said photomask having a first opening to expose an area to define a buried contact location and a second opening to expose said storage cell active areas; e) performing a first etching step thereby etching said patterned dielectric and a horizontal portion of said field oxide, said first etching step thereby reducing said field oxide bird's beak primarily in the horizontal direction; f) removing said photomask; g) depositing a polysilicon layer superjacent said wafer surface; h) depositing a second oxide layer superjacent said polysilicon layer; and i) performing a second step thereby etching said second oxide layer and said polysilicon layer to form trenches into said storage cell active areas thereby enlarging said storage cell active areas primarily in the vertical direction.

Claim 6

A method of enlarging storage cell active areas in random access memory devices fabricated on a wafer surface, the method comprising: a) depositing a first oxide layer superjacent the wafer surface; b) depositing a dielectric layer superjacent said first oxide layer and patterning said dielectric layer thereby defining locations for said active areas; c) growing field oxide on said first oxide layer not covered by said patterned dielectric layer, growing of said field oxide encroaches under the edges of said patterned dielectric thereby forming field oxide bird's beak; d) applying a photomask to said wafer surface, said photomask having a first opening to expose an area to define a buried contact location and a second opening to expose said storage cell active areas; e) performing a first etching step thereby etching said patterned dielectric and a horizontal portion of said field oxide, said first etching step thereby reducing said field oxide bird's beak primarily in the horizontal direction; f) removing said photomask; g) depositing a polysilicon layer superjacent said wafer surface; h) depositing a second oxide layer superjacent said polysilicon layer; and i) performing a second step thereby etching said second oxide layer and said polysilicon layer to form trenches into said storage cell active areas thereby enlarging said storage cell active areas primarily in the vertical direction.