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US5047969A
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General network modeling and synthesis
Assignee: Schlumberger Technologies Ltd
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Filing: 1988-12-15
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Granted: 1991-09-10
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Expires: 2008-12-15
Abstract
Abstract A method and apparatus for modeling and synthesizing the response of a network to selected input signals where the input signals may be multi-channel in analog or digital form, and where the network's response may be linear or non-linear and depend on the present input signals as well as its past responses. A relationship is established between the input signals and the network's response to the input signals. Basis vectors are selected capable of representing the relationship. Weighting values for each basis vector are calculated. The calculated weighting values are applied to the corresponding basis vectors to form weighted basis vectors. The synthesis and modeling are then performed by forming a linear combination of the weighted basis vectors. Provision is made for feeding back the linear combination to account for memory and other history-dependent responses of the network.
Inventors
- 👤 Edwin A. Sloane
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 15:05
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/36; G06F30/367; H; H03; H03H; H03H17/00
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
195 words
A modeling cell for modeling the input/output behavior of a reference network or system having an n-bit binary input channel, for receiving a sequence of unique n-bit state input vectors, and having at least one output channel, comprising: (a) time delay means coupled to each bit of said state input vector, each said time delay being independently assignable, thus forming a delayed state vector, of n-bits; (b) expansion means coupled to said time delay means for producing a unique 2 n state binary expansion vector from each said unique delayed state vector, each said state binary expansion vector being linearly independent; (c) one or more numerical look up tables, coupled to receive a 2 n state binary expansion vector, for transforming said 2 n state binary expansion vector to a 2 n state weighted expansion vector, each weight having independently assignable values related to the behavior of the reference network or system; (d) one or more digital adders, each coupled to one of said weighing means forming the sum of the individual weights of said weighted expansion vector, each said sum being an output signal corresponding to an output of the referenced network or system.
Claim 2
Dependent Claim
195 words
A modeling cell for modeling the input/output behavior of a reference network or system having an n-bit binary input channel, for receiving a sequence of unique n-bit state input vectors, and having at least one output channel, comprising: (a) time delay means coupled to each bit of said state input vector, each said time delay being independently assignable, thus forming a delayed state vector, of n-bits; (b) expansion means coupled to said time delay means for producing a unique 2 n state binary expansion vector from each said unique delayed state vector, each said state binary expansion vector being linearly independent; (c) one or more numerical look up tables, coupled to receive a 2 n state binary expansion vector, for transforming said 2 n state binary expansion vector to a 2 n state weighted expansion vector, each weight having independently assignable values related to the behavior of the reference network or system; (d) one or more digital adders, each coupled to one of said weighing means forming the sum of the individual weights of said weighted expansion vector, each said sum being an output signal corresponding to an output of the referenced network or system.
Claim 3
Dependent Claim
217 words
A modeling cell for modeling the input/output behavior of a reference network or system having an n-bit binary input channel, for receiving a sequence of unique n-bit state input vectors, and having at least one output channel, comprising: (a) time delay means coupled to each bit of said state input vector, each said time delay being independently assignable, thus forming a delayed state vector, of n-bits; (b) expansion means coupled to said time delay means for producing a unique 2 n state binary expansion vector from each said unique delayed state vector, each said state binary expansion vector being linearly independent; (c) one or more weighing means, coupled to receive a 2 n sate binary expansion vector, for transforming said 2 n sate binary expansion vector to a 2n state weighted expansion vector, each weight having independently assignable values related to the behavior of the reference network or system; (d) one or more summing means, each coupled to one of said weighing means forming the sum of the individual weights of said weighted expansion vector, each said sum being an output signal corresponding to an output of the referenced network of system; and (e) one or more analog-to-digital converters for accepting analog input signals whose binary output signals constitute all of part of said state input vector.
Claim 4
Dependent Claim
217 words
A modeling cell for modeling the input/output behavior of a reference network or system having an n-bit binary input channel, for receiving a sequence of unique n-bit state input vectors, and having at least one output channel, comprising: (a) time delay means coupled to each bit of said state input vector, each said time delay being independently assignable, thus forming a delayed state vector, of n-bits; (b) expansion means coupled to said time delay means for producing a unique 2 n state binary expansion vector from each said unique delayed state vector, each said state binary expansion vector being linearly independent; (c) one or more weighing means, coupled to receive a 2 n sate binary expansion vector, for transforming said 2 n sate binary expansion vector to a 2n state weighted expansion vector, each weight having independently assignable values related to the behavior of the reference network or system; (d) one or more summing means, each coupled to one of said weighing means forming the sum of the individual weights of said weighted expansion vector, each said sum being an output signal corresponding to an output of the referenced network of system; and (e) one or more analog-to-digital converters for accepting analog input signals whose binary output signals constitute all of part of said state input vector.
References Cited (Backward Citations)
US4811259A
Cited
US4809194A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-09 | 1995-03-11 | 1995-09-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-09 | 1999-03-11 | 1999-09-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-09 | 2003-03-11 | 2003-09-10 | $7700.00 | Window Closed / Lapsed |