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Constant current-constant voltage circuit

Assignee: Micron Memory Japan Ltd
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Filing: 1990-09-05
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Granted: 1991-09-10
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Expires: 2010-09-05
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Abstract

Abstract In a constant current-constant voltage circuit disclosed herein, gates of MOSFETs Q 1 and Q 2 are connected together, and the gate of the MOSFET Q 1 is connected to the drain thereof. Further, the source of the MOSFET Q 1 is connected to ground potential GND whereas the source of the MOSFET Q 2 is connected to the drain of a MOSFET Q 3 having a gate connected to power supply voltage V DD and a source connected to the ground voltage GND. A current mirror circuit including Q 4 and Q 5 has an input and an output respectively connected to the drain of the second MOSFET Q 2 and the drain of the first MOSFET Q 1 . A first coefficient (W 3 L 2 /L 3 W 2 ) depending upon channel lengths (L 2 , L 3 ) and channel widths (W 2 , W 3 ) of the MOSFETs Q 2 and Q 3 is set at a value not larger than a predetermined value. Therefore, the MOSFET Q 3 operates in a linear region as high resistance, and the MOSFETs Q 1 and Q 2 operate in a sub-threshold region. As a result, the dependence upon temperature is significantly improved.

Inventors

  • 👤 Koichiro Ishibashi
  • 👤 Katsuro Sasaki
  • 👤 Katsuhiro Shimohigashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 21:40
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G05F3/247; G05F1/00; G05F1/10; G05F1/46; G05F1/462; G05F1/463; G05F1/465; G05F3/245; Y; Y10; Y10S; Y10S323/00; Y10S323/907

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 140 words
A constant current-constant voltage circuit comprising: first and second MOSFETs having gates connected together; a third MOSFET having a drain-source path connected to a source of said second MOSFET; a current mirror circuit having an input connected to a drain of said second MOSFET and an output connected to a drain of said first MOSFET; the gate of said first MOSFET being connected to the drain thereof; a gate of said third MOSFET being connected to a predetermined operation potential point to make said third MOSFET operate in a linear region; and a first coefficient (W 3 L 2 /L 3 W 2 ) depending upon channel lengths (L 2 , L 3 ) and channel widths (W 2 , W 3 ) of said second and third MOSFETs being set at a value not larger than a predetermined value.
Claim 2
Dependent Claim 140 words
A constant current-constant voltage circuit comprising: first and second MOSFETs having gates connected together; a third MOSFET having a drain-source path connected to a source of said second MOSFET; a current mirror circuit having an input connected to a drain of said second MOSFET and an output connected to a drain of said first MOSFET; the gate of said first MOSFET being connected to the drain thereof; a gate of said third MOSFET being connected to a predetermined operation potential point to make said third MOSFET operate in a linear region; and a first coefficient (W 3 L 2 /L 3 W 2 ) depending upon channel lengths (L 2 , L 3 ) and channel widths (W 2 , W 3 ) of said second and third MOSFETs being set at a value not larger than a predetermined value.
Claim 3
Dependent Claim 31 words
A constant current-constant voltage circuit according to claim 1, wherein said first coefficient (W 3 L 2 /L 3 W 2 ) is set at a value not larger than 0.1.
Claim 4
Dependent Claim 95 words
A constant current-constant voltage circuit according to claim 1, wherein said third MOSFET is enhancement type, and a second coefficient K (=W 2 L 1 /W 1 L 2 ) depending upon channel widths (W 1 , W 2 ) and channel lengths (L 1 , L 2 ) of said first and second MOSFETs is set at a predetermined value whereas product KW 3 L 2 /L 3 W 2 of said first coefficient (W 3 L 2 /L 3 W 2 ) and said second coefficient K is set at 0.1 or less.
Claim 5
Dependent Claim 95 words
A constant current-constant voltage circuit according to claim 1, wherein said third MOSFET is depletion type and a second coefficient K (=W 2 L 1 /W 1 L 2 ) depending upon channel widths (W 1 , W 2 ) and channel lengths (L 1 , L 2 ) of said first and second MOSFETs is set at a predetermined value whereas product KW 3 L 2 /L 3 W 2 of said first coefficient W 3 L 2 /L 3 W 2 ) and said second coefficient K is set at 0.4 or less.

References Cited (Backward Citations)

JPS5822423A Cited
US4454467A Cited
US4694199A Cited
US4446383A Cited
US4654578A Cited
US4769589A Cited
US4935690A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-09-09 1995-03-11 1995-09-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-09-09 1999-03-11 1999-09-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-09-09 2003-03-11 2003-09-10 $7700.00 Window Closed / Lapsed

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