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US5045483A
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Self-aligned silicided base bipolar transistor and resistor and method of fabrication
Assignee: National Semiconductor Corp
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Filing: 1990-04-02
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Granted: 1991-09-03
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Expires: 2010-04-02
Abstract
Abstract A bipolar transistor and resistor are provided. Fabrication includes using a high temperature oxide to form sidewall spacers for the transistor contacts and/or to overlay the resistor portion of the device. Deposition of the HTO is combined with dopant drive-in so that fewer total steps are required. The process is compatible with MOS technology so that the bipolar transistor and resistor can be formed on a substrate along with MOS devices.
Inventors
- 👤 Bancherd DeLong
- 👤 Christopher S. Blair
- 👤 George E. Ganschow
- 👤 Thomas S. Crabb
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:05
CPC Classifications
H; H10; H10D; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10D1/00; H10D1/40; H10D1/47; H10D10/00; H10D10/01; H10D10/051; H10D10/052; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; Y; Y10; Y10S; Y10S148/00; Y10S148/123
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
130 words
A method for producing a bipolar transistor and a resistor on a substrate, comprising the steps of: selectively doping portions of said substrate to provide a buried layer, a collector layer, and a base layer overlying the collector layer; depositing a layer of polysilicon on said substrate; selectively doping and etching portions of said polysilicon layer to form emitter, base and collector contacts and a resistor; depositing a layer of high-temperature oxide over said polysilicon and exposed portions of said substrate at an elevated temperature, while simultaneously driving-in dopants from said polysilicon to increase doping concentrations in said base layer, said depositing taking place in the absence of a layer overlying said polysilicon; selectively etching said high temperature oxide to form sidewall spacers adjacent said collector, emitter and base contacts.
Claim 2
Independent Claim
130 words
A method for producing a bipolar transistor and a resistor on a substrate, comprising the steps of: selectively doping portions of said substrate to provide a buried layer, a collector layer, and a base layer overlying the collector layer; depositing a layer of polysilicon on said substrate; selectively doping and etching portions of said polysilicon layer to form emitter, base and collector contacts and a resistor; depositing a layer of high-temperature oxide over said polysilicon and exposed portions of said substrate at an elevated temperature, while simultaneously driving-in dopants from said polysilicon to increase doping concentrations in said base layer, said depositing taking place in the absence of a layer overlying said polysilicon; selectively etching said high temperature oxide to form sidewall spacers adjacent said collector, emitter and base contacts.
Claim 3
Dependent Claim
35 words
A method, as claimed in claim 1, further comprising: forming a metal silicide layer at least on the upper surfaces of said collector, emitter and base contacts and contacting said substrate adjacent said base region.
Claim 4
Independent Claim
167 words
A method for producing a bipolar transistor and a resistor on a substrate, comprising the steps of: selectively doping portions of said substrate to provide a buried layer, a collector layer, and a base layer overlying the collector layer; depositing a layer of polysilicon on said substrate; selectively doping and etching portions of said polysilicon layer to form emitter, base and collector contacts and a resistor; depositing a layer of high-temperature oxide over said polysilicon and exposed portions of said substrate at an elevated temperature, while simultaneously driving-in dopants from said polysilicon to increase doping concentrations in said base layer, said depositing taking place in the absence of a layer of nitride overlying said polysilicon; depositing a mask material on said high-temperature oxide in the region of said resistor; and selectively etching said high temperature oxide to form sidewall spacers adjacent said collector, emitter and base contacts, said masked material for maintaining the layer of high-temperature oxide over said resistor during selective etching of said high-temperature oxide.
Claim 5
Independent Claim
167 words
A method for producing a bipolar transistor and a resistor on a substrate, comprising the steps of: selectively doping portions of said substrate to provide a buried layer, a collector layer, and a base layer overlying the collector layer; depositing a layer of polysilicon on said substrate; selectively doping and etching portions of said polysilicon layer to form emitter, base and collector contacts and a resistor; depositing a layer of high-temperature oxide over said polysilicon and exposed portions of said substrate at an elevated temperature, while simultaneously driving-in dopants from said polysilicon to increase doping concentrations in said base layer, said depositing taking place in the absence of a layer of nitride overlying said polysilicon; depositing a mask material on said high-temperature oxide in the region of said resistor; and selectively etching said high temperature oxide to form sidewall spacers adjacent said collector, emitter and base contacts, said masked material for maintaining the layer of high-temperature oxide over said resistor during selective etching of said high-temperature oxide.
Claim 6
Dependent Claim
36 words
A method, as claimed in claim 3, further comprising: forming a metal silicide layer in regions not overlain by high temperature oxide wherein said sidewalls of said contacts and said resistor remain free of metal silicide.
Claim 7
Independent Claim
197 words
A method for producing a bipolar transistor and resistor on a substrate, comprising: selectively doping portions of said substrate to provide a collector layer, a buried layer, and a base layer overlying the collector layer; depositing a layer of polysilicon on said substrate; selectively doping and etching portions of said polysilicon layer to form emitter, base, and collector contacts and a resistor; depositing a layer of high-temperature oxide over said polysilicon and exposed portions of said substrate at an elevated temperature, while simultaneously driving-in dopants from said polysilicon to increase doping concentrations in said base layer, said depositing taking place in the absence of a layer of nitride overlying said polysilicon; depositing a masked material on said high-temperature oxide in the region of said resistor, to maintain a layer of high temperature oxide over said resistor; selectively etching said high-temperature oxide to form sidewalls spacers adjacent said collector and base contacts; and forming a metal silicide layer on at least the upper surfaces of said collector, emitter, and base contacts and on said substrate adjacent to said base, wherein said sidewalls of said contacts and at least a portion of said resistor remain free of metal silicide.
Claim 8
Independent Claim
197 words
A method for producing a bipolar transistor and resistor on a substrate, comprising: selectively doping portions of said substrate to provide a collector layer, a buried layer, and a base layer overlying the collector layer; depositing a layer of polysilicon on said substrate; selectively doping and etching portions of said polysilicon layer to form emitter, base, and collector contacts and a resistor; depositing a layer of high-temperature oxide over said polysilicon and exposed portions of said substrate at an elevated temperature, while simultaneously driving-in dopants from said polysilicon to increase doping concentrations in said base layer, said depositing taking place in the absence of a layer of nitride overlying said polysilicon; depositing a masked material on said high-temperature oxide in the region of said resistor, to maintain a layer of high temperature oxide over said resistor; selectively etching said high-temperature oxide to form sidewalls spacers adjacent said collector and base contacts; and forming a metal silicide layer on at least the upper surfaces of said collector, emitter, and base contacts and on said substrate adjacent to said base, wherein said sidewalls of said contacts and at least a portion of said resistor remain free of metal silicide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-02 | 1995-03-04 | 1995-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-02 | 1999-03-04 | 1999-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-02 | 2003-03-04 | 2003-09-03 | $7700.00 | Window Closed / Lapsed |