Patent US5034342A successfully refreshed from Google Patents.
US5034342A
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US
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Method of forming semiconductor stalk structure by epitaxial growth in trench
Assignee: Delphi Technologies Inc
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Filing: 1990-06-29
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Granted: 1991-07-23
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Expires: 2010-06-29
Abstract
Abstract A moat having a flat bottom and tapered side walls is formed in a monocrystalline silicon body (substrate) and extends from a top surface of the substrate into the substrate. An oxide layer is grown over side walls and a bottom of the moat and then is selectively removed from the bottom of the moat to expose silicon. An epitaxial stalk (a recessed mesa) is grown on the silicon at the bottom of the moat to a height which makes its top at least coplanar with the top surface of the substrate.
Inventors
- 👤 Diane W. Sidner
- 👤 Douglas J. Yoder
- 👤 David E. Moss
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 22:28
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/018; H10W10/10; Y; Y10; Y10S; Y10S438/00; Y10S438/936
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
148 words
A process for forming a semiconductive structure comprising the steps of: forming an apertured masking layer over a first surface of a monocrystalline semiconductive body; etching through apertures in the masking layer to form at each such aperture a moat in the semiconductive body having side walls and a bottom, wherein the etching undercuts the masking layer and the moat side walls are recessed under said masking layer; forming an insulating layer over the side walls and bottom of each moat; removing the insulating layer selectively from the bottom of each moat for exposing the underlying semiconductive body; and growing an epitaxial stalk essentially vertically on the exposed bottom of each moat to at least a height to make a top surface of the stalk essentially coplanar with the first surface of the semiconductive body, so that the stalk grows spaced from the side walls of its moat.
Claim 2
Dependent Claim
148 words
A process for forming a semiconductive structure comprising the steps of: forming an apertured masking layer over a first surface of a monocrystalline semiconductive body; etching through apertures in the masking layer to form at each such aperture a moat in the semiconductive body having side walls and a bottom, wherein the etching undercuts the masking layer and the moat side walls are recessed under said masking layer; forming an insulating layer over the side walls and bottom of each moat; removing the insulating layer selectively from the bottom of each moat for exposing the underlying semiconductive body; and growing an epitaxial stalk essentially vertically on the exposed bottom of each moat to at least a height to make a top surface of the stalk essentially coplanar with the first surface of the semiconductive body, so that the stalk grows spaced from the side walls of its moat.
Claim 3
Dependent Claim
21 words
The process of claim 1 in which the semiconductive body is of silicon and the insulating layer is of silicon oxide.
Claim 4
Dependent Claim
12 words
The process of claim 2 wherein the silicon oxide is silicon dioxide.
Claim 5
Dependent Claim
28 words
The process of claim 3 in which the etching condition are such as to result in etching at a faster rate vertically than laterally in the silicon body.
Claim 6
Dependent Claim
26 words
The process of claim 1 in which the growing step grows an epitaxial stalk in which the conductivity is different in different regions of the stalk.
Claim 7
Dependent Claim
25 words
The process of claim 1 wherein the semiconductive body is of silicon and the masking layer and the insulating layer are reach of silicon dioxide.
Claim 8
Dependent Claim
25 words
The process of claim 2 wherein the semiconductive body is of silicon an the masking layer and the insulating layer are each of silicon nitride.
Claim 9
Dependent Claim
30 words
The process of claim 1 wherein the semiconductive body is of silicon and the masking layer and the insulating layer each comprise a layer of silicon dioxide and silicon nitride.
References Cited (Backward Citations)
JPS59232440A
Cited
US4910165A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-07-22 | 1995-01-21 | 1995-07-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-22 | 1999-01-21 | 1999-07-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-22 | 2003-01-21 | 2003-07-23 | $7700.00 | Window Closed / Lapsed |