US5032694A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Conductive film circuit and method of manufacturing the same
Assignee: MITSUTOYO Corp A CORP OF JAPAN
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Filing: 1988-12-15
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Granted: 1991-07-16
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Expires: 2008-12-15
Abstract
Abstract A tantalum thin film circuit which is formed on an insulator or semiconductor substrate through an adhesive layer, a part or the entire surface of said tantalum thin film circuit being coated with a metal selected from among palladium, gold, platinum and rhodium or an alloy thereof. In addition, a conductive film circuit is formed on the thus formed tantalum thin film circuit by forming an interlayer insulating film having an adhesive layer on each of the upper and lower sides thereof, and forming a circuit using a metal selected from among tantalum, palladium, gold, platinum and rhodium or an alloy thereof.
Inventors
- 👤 Satoshi Ishihara
- 👤 Takeo Sugishita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 15:14
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D86/00; H10D86/01
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
107 words
A circuit assembly having a conductive pattern, said assembly consisting of an insulating or semiconducting substrate (6), a tantalum conductive film (1a) formed on said insulating or substrate, a coating (2) of a metal selected from the group consisting of palladium, gold, platinum, rhodium and an alloy thereof on at least a portion of said tantalum film, an adhesive layer (4) consisting of a tantalum oxide film formed on said coating and a portion of said insulating or semiconducting substrate, said adhesive layer having a via hole to complete the circuit with an electrode (5a; 5b) placed above said adhesive layer forming part of the conductive pattern.
Claim 2
Dependent Claim
107 words
A circuit assembly having a conductive pattern, said assembly consisting of an insulating or semiconducting substrate (6), a tantalum conductive film (1a) formed on said insulating or substrate, a coating (2) of a metal selected from the group consisting of palladium, gold, platinum, rhodium and an alloy thereof on at least a portion of said tantalum film, an adhesive layer (4) consisting of a tantalum oxide film formed on said coating and a portion of said insulating or semiconducting substrate, said adhesive layer having a via hole to complete the circuit with an electrode (5a; 5b) placed above said adhesive layer forming part of the conductive pattern.
Claim 3
Dependent Claim
138 words
A circuit assembly having a conductive pattern, said assembly being prepared by forming a thin tantalum conductive film (1a) on an insulating or semiconducting substrate (6), through a first adhesive layer consisting of a tantalum oxide thin film (4), coating a part or the entire surface of said tantalum thin film (1a) with a metal selected from the group consisting of palladium, gold, platinum, rhodium and an alloy thereof (2), forming a second adhesive layer consisting of tantalum oxide on said coating and at least a portion of said substrate, placing an insulating film (3) over said second adhesive layer and a portion of said insulating or semiconducting substrate, forming a via hole in said insulating film and in said second adhesive layer, placing an electrode (5a; 5b) above said insulating film forming part of the conductive pattern.
Claim 4
Dependent Claim
138 words
A circuit assembly having a conductive pattern, said assembly being prepared by forming a thin tantalum conductive film (1a) on an insulating or semiconducting substrate (6), through a first adhesive layer consisting of a tantalum oxide thin film (4), coating a part or the entire surface of said tantalum thin film (1a) with a metal selected from the group consisting of palladium, gold, platinum, rhodium and an alloy thereof (2), forming a second adhesive layer consisting of tantalum oxide on said coating and at least a portion of said substrate, placing an insulating film (3) over said second adhesive layer and a portion of said insulating or semiconducting substrate, forming a via hole in said insulating film and in said second adhesive layer, placing an electrode (5a; 5b) above said insulating film forming part of the conductive pattern.
References Cited (Backward Citations)
US3621442A
Cited
US4019168A
Cited
JPS52131158A
Cited
JPS55162254A
Cited
JPS55166949A
Cited
US4226932A
Cited
JPS5735364A
Cited
US4628149A
Cited
US4594473A
Cited
US4539434A
Cited
JPS6148993A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-07-15 | 1995-01-14 | 1995-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-15 | 1999-01-14 | 1999-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-15 | 2003-01-14 | 2003-07-16 | $7700.00 | Window Closed / Lapsed |