US5030924A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Temperature compensated exponential gain control circuit
Assignee: Silicon Systems Inc
•
Filing: 1989-03-30
•
Granted: 1991-07-09
•
Expires: 2009-03-30
Abstract
Abstract The present invention is directed to apparatus for providing temperature compensated exponential gain voltage to an AGC amplifier. The present invention uses emitter coupled pairs of transistors to implement an exponential gain control function. The present invention adds additional circuitry to drive the bases of the transistor pairs. The additional circuitry adds one gain stage in which the bias current is proportional to temperature and a second gain stage with a bias current which is constant over temperature. These gain stages, in combination with the transistor pairs, have no temperature dependence and retain the exponential gain function. This circuitry of the present invention allows a user to set the gain of the amplifier by an external voltage source providing a gain which is temperature independent. An advantage of the present invention is the cancellation of temperature dependence without the use of any temperature sensitive components. In addition, the circuitry of the present invention may used by any bipolar process.
Inventors
- 👤 Scott N. Fritz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 17:33
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G1/00; H03G1/04
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
74 words
An automatic gain control (AGC) circuit having first and second gain stages, comprising: a third gain stage providing a bias current which is constant over temperature; a fourth gain stage for providing a bias current which is proportional to temperature, the output of said fourth gain stage connected to inputs of both said first and second gain stages, the output of said third gain stage coupled to the input of said fourth gain stage.
Claim 2
Dependent Claim
74 words
An automatic gain control (AGC) circuit having first and second gain stages, comprising: a third gain stage providing a bias current which is constant over temperature; a fourth gain stage for providing a bias current which is proportional to temperature, the output of said fourth gain stage connected to inputs of both said first and second gain stages, the output of said third gain stage coupled to the input of said fourth gain stage.
Claim 3
Dependent Claim
17 words
The circuit of claim 1 wherein said first gain stage comprises first and second emitter coupled transistors.
Claim 4
Dependent Claim
17 words
The circuit of claim 2 wherein said second gain stage comprises third and fourth emitter coupled transistors.
Claim 5
Dependent Claim
21 words
The circuit of claim 3 wherein said third gain stage is coupled to the base of the second and fourth transistors.
Claim 6
Dependent Claim
21 words
The circuit of claim 4 wherein said fourth gain stage is coupled to the bases of the first and third transistors.
Claim 7
Dependent Claim
24 words
The circuit of claim 5 wherein said third gain stage comprises fifth and sixth transistors having emitters coupled through first and second resistors respectively.
Claim 8
Dependent Claim
31 words
The circuit of Claim 6 wherein said fourth gain stage comprises seventh and eighth emitter coupled transistors, the bases of said seventh and eighth transistors driven by said third gain stage.
Claim 9
Dependent Claim
106 words
An automatic gain control (AGC) circuit having first and second gain stages, said first gain stage comprising first and second emitter coupled transistors and said second gain stage comprising third and fourth emitter coupled transistors comprising: a third gain stage providing a bias current which is constant over temperature, said third gain stage comprising fifth and sixth transistors having emitters coupled through first and second resistors respectively; a fourth gain stage for providing a bias current which is proportional to temperature, said fourth gain stage comprising seventh and eighth emitter coupled transistors; said third and fourth gain stages coupled to said first and second gain stages.
Claim 10
Dependent Claim
106 words
An automatic gain control (AGC) circuit having first and second gain stages, said first gain stage comprising first and second emitter coupled transistors and said second gain stage comprising third and fourth emitter coupled transistors comprising: a third gain stage providing a bias current which is constant over temperature, said third gain stage comprising fifth and sixth transistors having emitters coupled through first and second resistors respectively; a fourth gain stage for providing a bias current which is proportional to temperature, said fourth gain stage comprising seventh and eighth emitter coupled transistors; said third and fourth gain stages coupled to said first and second gain stages.
Claim 11
Dependent Claim
21 words
The circuit of claim 8 wherein said third gain stage is coupled to the bases of said second and fourth transistors.
Claim 12
Dependent Claim
21 words
The circuit of claim 9 wherein said fourth gain stage is coupled to the bases of said first and third transistors.
Claim 13
Dependent Claim
163 words
An automatic gain control (AGC) circuit having first gain stage wherein said first gain stage comprises first and second emitter coupled transistors, and having a second gain stage wherein second gain stage comprises third and fourth emitter-coupled transistors, said circuit comprising: a third gain stage providing a bias current which is constant over temperature, wherein said third gain stage is coupled to the base of the second and fourth transistors and wherein said third gain stage comprises fifth and sixth transistors having emitters coupled through first and second resistors, respectively; a fourth gain stage for providing a bias current which is proportional to temperature, wherein said fourth gain stage is coupled to the base of the first and third transistors, and wherein said fourth gain stage comprises seventh and eighth emitter coupled transistors, the bases of said seventh and eighth transistors driven by said third gain stage, wherein said third and fourth gain stages are coupled to said first and second gain stages.
Claim 14
Dependent Claim
163 words
An automatic gain control (AGC) circuit having first gain stage wherein said first gain stage comprises first and second emitter coupled transistors, and having a second gain stage wherein second gain stage comprises third and fourth emitter-coupled transistors, said circuit comprising: a third gain stage providing a bias current which is constant over temperature, wherein said third gain stage is coupled to the base of the second and fourth transistors and wherein said third gain stage comprises fifth and sixth transistors having emitters coupled through first and second resistors, respectively; a fourth gain stage for providing a bias current which is proportional to temperature, wherein said fourth gain stage is coupled to the base of the first and third transistors, and wherein said fourth gain stage comprises seventh and eighth emitter coupled transistors, the bases of said seventh and eighth transistors driven by said third gain stage, wherein said third and fourth gain stages are coupled to said first and second gain stages.
Claim 15
Dependent Claim
100 words
An automatic gain control (AGC) circuit having first gain stage wherein said first gain stage comprises first and second emitter coupled transistors, and having a second gain stage wherein second gain stage comprises third and fourth emitter-coupled transistors said circuit comprising: a third gain stage providing a bias current which is constant over temperature, wherein said third gain stage is coupled to the base of the second and fourth transistors; a fourth gain stage for providing a bias current which is proportional to temperature, wherein said third and fourth gain stages are coupled to said first and second gain stages.
Claim 16
Dependent Claim
100 words
An automatic gain control (AGC) circuit having first gain stage wherein said first gain stage comprises first and second emitter coupled transistors, and having a second gain stage wherein second gain stage comprises third and fourth emitter-coupled transistors said circuit comprising: a third gain stage providing a bias current which is constant over temperature, wherein said third gain stage is coupled to the base of the second and fourth transistors; a fourth gain stage for providing a bias current which is proportional to temperature, wherein said third and fourth gain stages are coupled to said first and second gain stages.
Claim 17
Dependent Claim
21 words
The circuit of claim 12 wherein said fourth gain stage is coupled to the base of the first and third transistors.
Claim 18
Dependent Claim
24 words
The circuit of claim 13 wherein said third gain stage comprises fifth and sixth transistors having emitters coupled through first and second resistors, respectively.
Claim 19
Dependent Claim
31 words
The circuit of claim 14 wherein said fourth gain stage comprises seventh and eighth emitter coupled transistors, the basis of said seventh and eighth transistors driven by said third gain stage.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-07-08 | 1995-01-07 | 1995-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-08 | 1999-01-07 | 1999-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-08 | 2003-01-07 | 2003-07-09 | $7700.00 | Window Closed / Lapsed |