US3676789A
Expired / Lapsed
US
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Low distortion agc amplifier
Assignee: Individual
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Filing: 1970-11-16
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Granted: 1972-07-11
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Expires: 1990-11-16
Abstract
Abstract A linear amplifier in an automatic gain control circuit whose gain is a function of the ratio of two bias currents is obtained by selectively coupling two pairs of semiconductor devices such that the effects of nonlinearities due to the logarithmic relationship between voltage and current across a PN junction cancel. The relationship between the two pairs of devices is such that the output signal from the second pair of devices is linearly related to the input signal driving the first pair of devices.
Inventors
- 👤 Derek Bray
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 03:40
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0017; H03G1/0023; H03G3/00; H03G3/20; H03G3/30; H03G3/3036
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
308 words
An automatic gain control circuit comprising: means for amplifying an input signal to produce a first output signal; means for comparing said first output signal to a reference signal and for producing a difference signal proportional to the difference between said first output signal and said reference signal; and first and second current sources, the amplitudes of the currents drawn by said sources being controlled by said difference signal, said first and second current sources being coupled to said means for amplifying so that the currents from said first and second current sources control the gain of said means for amplifying such that said difference signal is driven to approximately zero amplitude; said means for amplifying comprising: a differential amplifier, the bias current through said differential amplifier being the current drawn by said first current source; a first pair of semiconductor devices selectively coupled to said differential amplifier and biased by the current drawn by said first current source, the current through the first device in said first pair increasing in response to a positive input signal to said differential amplifier while the current through the second device in said first pair decreases an equal amount in response to said positive input signal; and a second pair of semiconductor devices, each device in said second pair being selectively coupled to a corresponding device in said first pair of devices so that when the current through a selected one of said first pair of devices changes in one direction, the current through the corresponding device in said second pair of devices changes in the opposite direction in such a manner that the output signal from said second pair of devices is linearly related to the input signal to said differential amplifier, the bias current through said second pair of devices being the current drawn by said second current source.
Claim 2
Dependent Claim
308 words
An automatic gain control circuit comprising: means for amplifying an input signal to produce a first output signal; means for comparing said first output signal to a reference signal and for producing a difference signal proportional to the difference between said first output signal and said reference signal; and first and second current sources, the amplitudes of the currents drawn by said sources being controlled by said difference signal, said first and second current sources being coupled to said means for amplifying so that the currents from said first and second current sources control the gain of said means for amplifying such that said difference signal is driven to approximately zero amplitude; said means for amplifying comprising: a differential amplifier, the bias current through said differential amplifier being the current drawn by said first current source; a first pair of semiconductor devices selectively coupled to said differential amplifier and biased by the current drawn by said first current source, the current through the first device in said first pair increasing in response to a positive input signal to said differential amplifier while the current through the second device in said first pair decreases an equal amount in response to said positive input signal; and a second pair of semiconductor devices, each device in said second pair being selectively coupled to a corresponding device in said first pair of devices so that when the current through a selected one of said first pair of devices changes in one direction, the current through the corresponding device in said second pair of devices changes in the opposite direction in such a manner that the output signal from said second pair of devices is linearly related to the input signal to said differential amplifier, the bias current through said second pair of devices being the current drawn by said second current source.
Claim 3
Dependent Claim
182 words
Structure as in claim 1 in which said differential amplifier comprises: a first transistor the base of which serves as the first input lead to said differential amplifier, the emitter of which is connected through a first load resistor to said first current source, and the collector of which is connected to said first device in said first pair of semiconductor devices; a second transistor, the base of which serves as a second input lead to said differential amplifier, the emitter of which is connected through a second load resistor to said first current source, and the collector of which is connected to said second device in said first pair of semiconductor devices; said first and second transistors being connected in such a manner that a positive input voltage on said first input lead relative to said second input lead increases the current drawn through the first transistor and simultaneously decreases by aN equal amount the current drawn through the second transistor, thereby changing in the same manner the current drawn through the corresponding devices in said first pair of semiconductor devices.
Claim 4
Dependent Claim
168 words
Structure as in claim 2 in which said first pair of semiconductor devices comprises: a third transistor the emitter of which is connected to the collector of the first transistor in said differential amplifier, the base of which is connected to a first supply voltage and the collector of which is connected to a second supply voltage; and a fourth transistor, the emitter of which is connected to the collector of the second transistor in said differential amplifier, the base of which is connected to said first supply voltage and the collector of which is connected to said second supply voltage; said third and fourth transistors being connected to said first and second transistors in said differential amplifier in such a manner that an increase in the collector current drawn by said first transistor and a corresponding decrease in the collector current drawn by said second transistor results in a corresponding emitter current increase in said third transistor and a corresponding emitter current decrease in said fourth transistor.
Claim 5
Dependent Claim
131 words
Structure as in claim 3, in which said second pair of semiconductor devices comprises: a fifth transistor the emitter of which is connected to said second current source, the base of which is connected to the emitter of said fourth transistor in said first pair of semiconductor devices and the collector of which is connected both to said second voltage source and to a first output lead from said automatic gain control circuit; and a sixth transistor the emitter of which is also connected to said second current source, the base of which is connected to the emitter of said third transistor, and the collector of which is connected both to a selected voltage source through a load resistor and to a second output lead from said automatic gain control circuit.
Claim 6
Dependent Claim
24 words
Structure as in claim 4 in which the collector of said fifth transistor is connected to said second voltage source through a load resistor.
Claim 7
Dependent Claim
251 words
An amplifier circuit comprising: a first current source drawing the current I1; a second current source drawing the current I2; a differential amplifier connected to said first current source so that the bias current through said differential amplifier equals the current I1 drawn by said first current source, said differential amplifier comprising first and second amplifying means connected to the input leads to said amplifier circuit in such a manner that a voltage of one polarity across said input leads causes the current through said first and second amplifying means to change equally in opposite directions; a first pair of semiconductor devices, the first and second devices in said first pair being coupled to said first and second amplifying means respectively and drawing the bias current I1, said first and second devices in said first pair comprising diodes; a second pair of semiconductor devices, the first and second devices in said second pair each being selectively coupled to a corresponding one of the devices in said first pair so that a current change in a device in the first pair results in a linearly related current change not necessarily of the same amplitude in the corresponding coupled device in said second pair such that the changes in currents through the devices in said second pair are linearly related to the voltage across the input leads to said first and second amplifying means, said second pair of devices being connected to said second current source and drawing the total bias current I2.
Claim 8
Dependent Claim
251 words
An amplifier circuit comprising: a first current source drawing the current I1; a second current source drawing the current I2; a differential amplifier connected to said first current source so that the bias current through said differential amplifier equals the current I1 drawn by said first current source, said differential amplifier comprising first and second amplifying means connected to the input leads to said amplifier circuit in such a manner that a voltage of one polarity across said input leads causes the current through said first and second amplifying means to change equally in opposite directions; a first pair of semiconductor devices, the first and second devices in said first pair being coupled to said first and second amplifying means respectively and drawing the bias current I1, said first and second devices in said first pair comprising diodes; a second pair of semiconductor devices, the first and second devices in said second pair each being selectively coupled to a corresponding one of the devices in said first pair so that a current change in a device in the first pair results in a linearly related current change not necessarily of the same amplitude in the corresponding coupled device in said second pair such that the changes in currents through the devices in said second pair are linearly related to the voltage across the input leads to said first and second amplifying means, said second pair of devices being connected to said second current source and drawing the total bias current I2.
Claim 9
Dependent Claim
24 words
Structure as in claim 6 in which said first and second devices in said first pair comprise first and second transistors connected as diodes.
Claim 10
Dependent Claim
24 words
Structure as in claim 7 in which said first and second devices in said second pair of semiconductor deviceS are third and fourth transistors.
Claim 11
Dependent Claim
129 words
An N stage amplifier, where N is a selected positive integer, wherein each stage comprises: a first pair of semiconductor devices; a differential amplifier selectively coupled to said first pair of semiconductor devices for passing an input signal to said first pair of devices, a second pair of semiconductor devices, each device in said second pair being connected to a corresponding device in said first pair so that the effect on a signal of nonlinearities in said two connected devices cancel out; a first current source for biasing said differential amplifier and said first pair of devices; a second current source for biasing said second pair of devices; and means for varying the currents produced by said first and second sources thereby to vary the gain of said stage.
Claim 12
Dependent Claim
129 words
An N stage amplifier, where N is a selected positive integer, wherein each stage comprises: a first pair of semiconductor devices; a differential amplifier selectively coupled to said first pair of semiconductor devices for passing an input signal to said first pair of devices, a second pair of semiconductor devices, each device in said second pair being connected to a corresponding device in said first pair so that the effect on a signal of nonlinearities in said two connected devices cancel out; a first current source for biasing said differential amplifier and said first pair of devices; a second current source for biasing said second pair of devices; and means for varying the currents produced by said first and second sources thereby to vary the gain of said stage.
Claim 13
Dependent Claim
307 words
An automatic gain control circuit comprising: current source means for drawing a first current I1; current source means for drawing a second current I2; a differential amplifier, the bias current through said differential amplifier being I1, a first pair of semiconductor devices directly coupled to said differential amplifier and biased by the current I1, the current through the first device in said first pair increasing in response to a positive input signal to said differential amplifier while the current through the second device in said first pair decreases an equal amount in response to said positive input signal; a second pair of semiconductor devices biased by the current I2, each device in said second pair being directly coupled to a corresponding device in said first pair such that a current of Is2in one of said second pair of semiconductor devices is related to a current change Is1 in a first pair of semiconductor devices by the equation Is1/Is2 I1/I2; said differential amplifier comprising: a first transistor the base of which serves as the first input lead to said differential amplifier, the emitter of which is connected through a first load resistor R3 to said means for drawing a first current, and the collector of which is connected to said first device of said first pair of semiconductor devices; and a second transistor, the base of which serves as a second input lead to said differential amplifier, the emitter of which is connected through a second load resistor R4 to said means for drawing a first current, and the collector of which is connected to said second device in said first pair of semiconductor devices; and wherein said current change Is2 in a device in said second pair of semiconductor devices is related to the input voltage Vin to said differential amplifier by the equation Is2/Vin I2/I1 (R3+R4).
Claim 14
Dependent Claim
307 words
An automatic gain control circuit comprising: current source means for drawing a first current I1; current source means for drawing a second current I2; a differential amplifier, the bias current through said differential amplifier being I1, a first pair of semiconductor devices directly coupled to said differential amplifier and biased by the current I1, the current through the first device in said first pair increasing in response to a positive input signal to said differential amplifier while the current through the second device in said first pair decreases an equal amount in response to said positive input signal; a second pair of semiconductor devices biased by the current I2, each device in said second pair being directly coupled to a corresponding device in said first pair such that a current of Is2in one of said second pair of semiconductor devices is related to a current change Is1 in a first pair of semiconductor devices by the equation Is1/Is2 I1/I2; said differential amplifier comprising: a first transistor the base of which serves as the first input lead to said differential amplifier, the emitter of which is connected through a first load resistor R3 to said means for drawing a first current, and the collector of which is connected to said first device of said first pair of semiconductor devices; and a second transistor, the base of which serves as a second input lead to said differential amplifier, the emitter of which is connected through a second load resistor R4 to said means for drawing a first current, and the collector of which is connected to said second device in said first pair of semiconductor devices; and wherein said current change Is2 in a device in said second pair of semiconductor devices is related to the input voltage Vin to said differential amplifier by the equation Is2/Vin I2/I1 (R3+R4).
References Cited (Backward Citations)
US3440554A
Cited
US3444472A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-07-11 | 1976-01-10 | 1976-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-07-11 | 1980-01-10 | 1980-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-07-11 | 1984-01-10 | 1984-07-11 | $7700.00 | Window Closed / Lapsed |