Programmable logic device with ganged output pins

Claim 1

A programmable logic device comprising, a plurality of functional units, each functional unit having a set of inputs and a set of outputs, each functional unit being individually programmable for carrying out one or more specified logic functions, each functional unit being a programmable logic device with an AND array and an OR array connected to the AND array, a first set of conductive lines, each line of said first set being permanently connected to an output from an OR array of one of said functional units, a second set of conductive lines, each line of said second set being permanently connected to an input to an AND array of one of said functional units, wherein said second set of conductive lines cross said first set of conductive lines, areas where said first and second sets of conductive lines cross forming at least one programmable interconnection matrix, said at least one matrix including programmable links at the intersections of each conductive line of the first set with a conductive line of the second set, each of said links being selectively openable and closable so as to connect any output of any functional unit to any input of any functional unit, a plurality of input pins, each input pin being selectively connectable to at least one conductive line of said second set, and a plurality of output pins, each output pin being permanently connected directly to one conductive line of said first set.