EP0219221A2
Expired / Lapsed
EP
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Semi-conductor integrated circuits
Assignee: Pilkington Micro Electronics Ltd
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Filing: 1986-09-10
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Granted: —
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Expires: 2006-09-10
Abstract
Abstract Configurable semiconductor integrated circuits as-made each have a plurality of logic circuits formed at discrete sites (10S). For each logic circuit, direct selectably conducting/non- conducting connection paths (14A,B,C,F) extend from its output to input of a first set of other logic circuits and to its inputs from outputs of a second set of other logic circuits. All of the sets for all of the logic circuits are each different. Other direct connection paths (50R,50C) are selectably connectable to inputs (14D,E) and outputs (52G,H) of the logic circuits. Selection can be irreversible (Figure 8) or reversible (Figures 9, 10, 11, 18) and involves coincident signal addressing (22R,C) of the sites (105) and coded configuring ofthe paths at that site. Reversible selection can beviafield effect transistors or bipolar transistors and can be at or near normal logic signal levels and speeds (Figures 11 and 18). Versatile configurable input/output arrangements are described (Figures 13-16), also reconfigurable data processing systems using the reversible transistor provisions (Figures 20-23).
Inventors
- 👤 Kenneth Austin
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 20:34
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17748; G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33; G06F30/3308; G06F30/331; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K19/1733; H03K19/1735; H03K19/1736; H03K19/17704; H03K19/17736; H03K19/1778; H03K5/00; H03K5/01; H03K5/02; H03K5/026; H10; H10D; H10D86/00; H10D86/01; H10D86/021; H10D86/0221
Claims Analysis
Total Claims: 44
Claim 1
Independent Claim
107 words
A configurable semiconductor integrated circuit which, as-made, comprises an area (300) thereof formed both with a plurality of logic circuits (10) at discrete sites (105), respectively, and with a restricted signal translation system (14) between inputs and outputs of the logic circuits affording direct connection paths (14A,B,C,F) each selectable as to its conduction state, those paths extending, for each said logic circuit (10R), from its output to inputs of a first set (FS) of other said logic circuits and from its inputs to outputs of a second set (SS) of other said logic circuits, all of the sets (for all of the logic circuits) each being unique.
Claim 2
Dependent Claim
107 words
A configurable semiconductor integrated circuit which, as-made, comprises an area (300) thereof formed both with a plurality of logic circuits (10) at discrete sites (105), respectively, and with a restricted signal translation system (14) between inputs and outputs of the logic circuits affording direct connection paths (14A,B,C,F) each selectable as to its conduction state, those paths extending, for each said logic circuit (10R), from its output to inputs of a first set (FS) of other said logic circuits and from its inputs to outputs of a second set (SS) of other said logic circuits, all of the sets (for all of the logic circuits) each being unique.
Claim 3
Dependent Claim
66 words
An integrated circuit according to claim 1, wherein some of the inputs and outputs of some of the logic circuits have selectable connection paths (L1-L5,D1-D6) extending to input/output means (310) for servicing the plurality of logic circuits, and wherein each of the sets (FS, SS) for at least the remainder of said logic cicuits (10R) comprises at least three other of said logic circuits (via 14A,B,C).
Claim 4
Dependent Claim
32 words
An integrated circuit according to claim 2, wherein, at least for each said remaining logic circuit (10R), the first (FS) and second (SS) sets include two said logic circuits (FS+SS) in common.
Claim 5
Dependent Claim
42 words
An integrated circuit according to claim 2 or claim 3, wherein, at least for some said remaining logic circuit (lOR), each of the first (FS) and second (SS) sets includes two gates (FS or SS alone) not in common with the other.
Claim 6
Dependent Claim
90 words
An integrated circuit according to any preceding claim, wherein, considering said logic circuits (10) as arranged in rows and columns, each said logic circuit (FS or SS alone) that is in one of the first and second sets of another (10R) of said logic circuits but not in the other said set is in the same row as that other logic cicuit (10R), and where there are two next row-adjacent said logic circuits to that other circuit, they are in a different ones of its said first and second sets.
Claim 7
Dependent Claim
50 words
An integrated circuit according to claim 5, wherein others of said logic circuits (FS or SS alone) in the same row and in only one of the first and second sets of a said logic circuit are next but one to said logic circuit in the same row (by 14F).
Claim 8
Dependent Claim
59 words
An integrated circuit according to any preceding claim wherein, considering said logic circuits (10) as arranged in rows and columns (Figures 1,2), each said logic circuit (FS + SS) that is in both of the first and second sets of another said logic circuit (10R) is next to and in the same column as that other logic circuit (10R).
Claim 9
Dependent Claim
47 words
An integrated circuit according to claim 5, 6 or 7, wherein at least some of said logic.circuits (FS + SS) that are next adjacent in columns are oppositely formed at their said sites in the sense of access to their outputs (Figures 1,2; arrows in Figure 7).
Claim 10
Dependent Claim
30 words
An integrated circuit according to claim 8, wherein the oppositely formed logic cicuits alternate in each column but are similarly formed in each row (Figures 1,2; arrows in Figure 7).
Claim 11
Dependent Claim
97 words
An integrated circuit according to any preceding claim, further comprising another signal translation system (50) having at least one other direct connection path (50R,C) of an extent traversing more of said sites than can be related through any said set of direct connection paths (14A,B,C,F), and wherein further input connection paths (14D,E) of the logic circuits, and further output connection paths (52G,H) of the logic circuits (10) where present, are each selectable in a manner similar to said direct connection paths (14A,B,C,F) and said further connection paths constitute branches (52R,C,G,H) from said other direct connection path (50R,C).
Claim 12
Dependent Claim
109 words
An integrated circuit according to claim 10, wherein said further input connection paths (14D,E), and further output connection paths (52G,H) where present, constituting said branches (52) are two per logic circuit, and said other signal translation system (50) has plural said other direct connection paths some (50R) extending between rows of a matrix array of said sites (105) and others (50C) extending between columns of said sites, said further input connection paths (52R,C-14D,E) at each said site, and further output connection paths (52G,H) where present, being branched to a unique corresponding combination of one each of the row-following (50R) and column-following (50C) ones of said other direct connection paths.
Claim 13
Dependent Claim
24 words
An integrated circuit according to claim 10, or claim 11, wherein at least some of said other direct connection paths comprise discrete segments (53).
Claim 14
Dependent Claim
40 words
An integrated circuit according to claim 10, 11 or 12, wherein row-following (50R) and column-following (50C) ones of said other direct connection paths are connectable to each other via a said logic circuit (10) for which said unique combination applies.
Claim 15
Dependent Claim
88 words
An integrated circuit according to any preceding claim, wherein all selectable connection paths (14,52) each include a circuit element (24) dedicated thereto and whose as-made conduction state can be changed by application of configuring electrical signals or signal conditions, and wherein each said circuit element (24) has associated further circuitry (32) by which it is conditioned in application of said configuring electrical signals, and wherein conducting address paths (22R,C) traverse said area (300) for energisation in conditioning the further circuitry (32 etc) of circuit elements to be configured.
Claim 16
Dependent Claim
47 words
An integrated circuit according to claim 14, wherein said circuit elements (24) and associated further circuitry (32) for all inputs (14) of each logic circuit, and outputs (52G,H) where selectable, are disposed adjacent to the corresponding gate circuit (10) and included within the corresponding said site (105).
Claim 17
Dependent Claim
71 words
An integrated circuit according to claim 14 or claim 15, further comprising program conducting paths (42 of 40) corresponding in number to the number of selectable connection paths (14,52) at a said site and serving to cause application of said configuring electrical signals in respect of selected said connection paths, and wherein said program conducting paths (42) traverse throughout the logic circuits and are branched (43) into each said site (105).
Claim 18
Dependent Claim
42 words
An integrated circuit according to claim 13 or claim 14, wherein coincident-signal-operating said conducting address paths (42) are in plural groups (X1 etc, Y1 etc) and each selectable connection path at each site has coded connection thereto for generating configuring signal conditions.
Claim 19
Dependent Claim
36 words
An integrated circuit according to any one of claims 14 to 17, wherein each said circuit element comprises a conducting link (24) that will be rendered irreversibly non-conducting by a said configuring electrical signal applied thereto.
Claim 20
Dependent Claim
54 words
An integrated circuit according to claim 18, wherein each said further circuitry includes an active circuit device (32) connected in series with its associated said conducting link (24), said active circuit device (32) being rendered conducting by signals from said address paths (50R,C) in order to pass a said configuring electrical signal if applied.
Claim 21
Dependent Claim
46 words
An integrated circuit according to any one of claims 14 to 17, wherein a said circuit element comprises an active circuit component (124 etc) having a conduction control connection and that remains reversible as to its conduction state after application of a said configuring electrical signal.
Claim 22
Dependent Claim
84 words
An integrated circuit according to claim 20, wherein the active circuit component (124 etc) comprises a transistor, and wherein each said further circuitry includes an active circuit device (132 etc) connected to the conduction control connection of its associated said active circuit component (124 etc), said active circuit device (132 etc) being rendered capable of conduction using signals from said address paths (122R,C etc) so as to provide a configuring electrical signal condition when the active circuit device (132 etc) is actually rendered conducting.
Claim 23
Dependent Claim
27 words
An integrated circuit according to claim 20 or claim 21, wherein the active circuit device (132) will remain conducting after being rendered conducting by a pulse signal.
Claim 24
Dependent Claim
22 words
An integrated circuit according to claim 22, wherein the active circuit device (132) is a field effect transistor of charge trapping type.
Claim 25
Dependent Claim
32 words
An integrated circuit according to claim 20, 21 or 22, wherein said active circuit component (124') requires repeated application of said configuring electrical signal in order to maintain its configured conduction state.
Claim 26
Dependent Claim
47 words
An integrated circuit according to claim 24, wherein the active circuit component is a field effect transistor (124') relying on its own capacitance to remain adequately conducting between periodic applications of said energising electrical signal and its said further circuitry is of field effect switching transistor type.
Claim 27
Dependent Claim
33 words
An integrated circuit according to claim 20 or claim 21, wherein the active circuit component is a bipolar transistor (424) and its said further circuitry (420) is of triggerable conduction state setting type.
Claim 28
Dependent Claim
67 words
An integrated circuit according to claim 26, wherein said further circuitry comprises a bipolar circuit equivalent of two complementary transistors (420A,B) interconnected base-to-collector, and wherein said further circuitry further comprises a bipolar transistor (422) controlling a voltage applied to a said base-to-collector connection and serving for setting a voltage condition required for switching of the further circuitry (422) then setting the active circuit component (424) to conduction.
Claim 29
Dependent Claim
26 words
An integrated circuit according to any preceding claim, wherein each logic circuit (10 etc) is a single-output logic gate for performing a single inverting logic function.
Claim 30
Dependent Claim
66 words
An integrated circuit according to claim 28, wherein the logic circuits (110 etc) each have a lesser number of operative inputs (110A,B) than there are selectable said connecting paths (114 etc) for input purposes, and those selectable connecting paths are in groups (114A,B,152R,C,114A,C,152C) each connected to a different operative input (110A,B) for selection of one said path of any group relative to the corresponding operative input.
Claim 31
Dependent Claim
27 words
An integrated circuit according to claim 29, wherein at least one of the selectable connecting paths (114A) for input purpose is in more than one said group.
Claim 32
Dependent Claim
45 words
An integrated circuit according to claim 28 with claim 26, wherein the bipolar transistor (424) constituting the active circuit component is an input stage for a NAND logic gate transistor (410) whose control electrode is connected in the emitter-collector circuit of the former transistor (424).
Claim 33
Dependent Claim
47 words
An integrated circuit according to any preceding claim, further comprising input-output circuitry (310) formed with communication to logic circuit inputs and outputs (L1-L5,D1-D6) extending from said area, said input-output circuitry (310) comprising cells (310A-D) each servicing a different side of a matrix array of said logic gates.
Claim 34
Dependent Claim
40 words
An integrated circuit according to claim 32, wherein each cell (310A-D) comprises subcells (330) configurable between first and second states in which signals can go to logic circuit inputs (L,D odd) or come from logic circuit inputs (D even), respectively.
Claim 35
Dependent Claim
38 words
An integrated circuit according to claim 33, wherein subcells (330) connected to outputs of edge-most ones of an array of the logic cells are further connected (D even) to inputs of the next ones of the logic circuits.
Claim 36
Dependent Claim
43 words
An integrated circuit according to claim 33 or claim 34, wherein each said subcell (330) is connected to a unique group of logic circuit inputs and outputs (DA, QA) and there are fewer subcells (330) than serviced logic circuit inputs and outputs (DA,QA).
Claim 37
Dependent Claim
28 words
An integrated circuit according to claim 33, 34, or 35, further comprising conducting paths (320A-D) interconnecting chip connections of selected subcells on two adjacent sides of the array.
Claim 38
Dependent Claim
77 words
An electronic system comprising a reconfigurable semiconductor integrated circuit (600) having a plurality of logic circuits for which alternative configurations involving different interconnections of inputs and outputs of the logic circuits enable different performance of some overall system function, means for presenting (602) to the reconfigurable integrated circuit configuration - defining signals to which the reconfigurable integrated circuit (600) is responsive to adopt a desired configuration, and means (620) for utilising signals from the reconfigurable integrated circuit.
Claim 39
Dependent Claim
77 words
An electronic system comprising a reconfigurable semiconductor integrated circuit (600) having a plurality of logic circuits for which alternative configurations involving different interconnections of inputs and outputs of the logic circuits enable different performance of some overall system function, means for presenting (602) to the reconfigurable integrated circuit configuration - defining signals to which the reconfigurable integrated circuit (600) is responsive to adopt a desired configuration, and means (620) for utilising signals from the reconfigurable integrated circuit.
Claim 40
Dependent Claim
48 words
A system according to claim 37, wherein the means for presenting includes a store system (602) readable to provide said configuration representative signals on an alternative basis for each of different configurations, and further comprising means (550,608) for addressing the store system according to which configuration is required.
Claim 41
Dependent Claim
34 words
A system according to claim 37 or claim 38, comprising a plurality of said reconfigurable integrated circuits with bus signal translation provision (805,905) between them for serial/parallel processing in relation to overall system function.
Claim 42
Dependent Claim
17 words
A system according to claim 39, wherein each reconfigurable integrated circuit (600) has its own store (602).
Claim 43
Dependent Claim
26 words
A system according to claim 38, 39 or claim 40, comprising a further signal translation provision (914,918) for addressing and writing configuration data to each store.
Claim 44
Independent Claim
26 words
A system according to any one of claims 37 to 41, wherein each reconfigurable chip is as claimed in any one of claims 20 to 36.
References Cited (Backward Citations)
No citation records indexed.
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