Patent US5021360A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5021360A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of farbicating highly lattice mismatched quantum well structures

Assignee: Verizon Laboratories Inc
•
Filing: 1989-09-25
•
Granted: 1991-06-04
•
Expires: 2009-09-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method of fabricating a semiconductor heterostructure includes the growth of a quantum well active region that is highly lattice-mismatched relative to a substrate. A buffer layer having a thickness above a critical value is grown on the substrate whereby the stress due to a lattice constant mismatch between the buffer layer and substrate is relieved through the formation of misfit dislocations. A strained superlattice structure is grown on the buffer layer in order to terminate any upwardly-propagating dislocations. An unstrained barrier layer is subsequently grown on the superlattice structure. The fabrication method concludes with the growth of a quantum well structure on the unstrained layer wherein a lattice constant mismatch between the quantum well structure and the unstrained barrier layer is smaller than the lattice constant mismatch between the quantum well structure and the substrate. As a result, only a fraction of the stress due to the large lattice mismatch between the quantum well structure and the substrate is accommodated by coherent strain in the quantum well structure, while the remainder of the stress is relieved through the formation of misfit dislocations spatially separated from the quantum well structure.

Inventors

  • 👤 Paul Melman
  • 👤 Boris S. Elman
  • 👤 Emil S. Koteles
  • 👤 Chirravuri Jagannath

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 09:15
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2907; H10P14/2911; B; B82; B82Y; B82Y20/00; H01; H01S; H01S5/00; H01S5/30; H01S5/34; H10P14/32; H10P14/3202; H10P14/3214; H10P14/3221; H10P14/3242; H10P14/3244; H10P14/3251; H10P14/3252; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3421; H01S5/3403; H01S5/3406; Y; Y10; Y10S; Y10S148/00; Y10S148/06; Y10S148/097; Y10S148/16; Y10S438/00; Y10S438/936; Y10S438/938

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 179 words
A method of fabricating a semiconductor heterostructure, comprising the steps of: providing a substrate; growing a buffer layer of semiconducting material on said substrate wherein said layer is lattice-mismatched relative to said substrate and has a thickness greater than a critical thickness; growing a strained superlattice structure on said buffer layer wherein said provided substrate, said buffer layer, and said superlattice structure together form an effective substrate; growing an unstrained barrier layer on said superlattice structure; and forming on said unstrained barrier layer a quantum well structure serving as an active region wherein a lattice constant mismatch between said quantum well structure and said barrier layer is smaller than the lattice constant mismatch between said quantum well structure and said provided substrate; whereby only a fraction of the stress due to the large lattice mismatch between said quantum well structure and said provided substrate is accommodated by coherent strain in said quantum well structure, while the remainder of said stress is relieved in said effective substrate through the formation of misfit dislocations spatially separated from said quantum well structure.
Claim 2
Independent Claim 179 words
A method of fabricating a semiconductor heterostructure, comprising the steps of: providing a substrate; growing a buffer layer of semiconducting material on said substrate wherein said layer is lattice-mismatched relative to said substrate and has a thickness greater than a critical thickness; growing a strained superlattice structure on said buffer layer wherein said provided substrate, said buffer layer, and said superlattice structure together form an effective substrate; growing an unstrained barrier layer on said superlattice structure; and forming on said unstrained barrier layer a quantum well structure serving as an active region wherein a lattice constant mismatch between said quantum well structure and said barrier layer is smaller than the lattice constant mismatch between said quantum well structure and said provided substrate; whereby only a fraction of the stress due to the large lattice mismatch between said quantum well structure and said provided substrate is accommodated by coherent strain in said quantum well structure, while the remainder of said stress is relieved in said effective substrate through the formation of misfit dislocations spatially separated from said quantum well structure.
Claim 3
Dependent Claim 45 words
The method of growing a semiconductor heterostructure as recited in claim 1 wherein the step of growing an unstrained barrier layer includes the steps of: growing a layer of uniform composition; and growing a superlattice structure having a graded composition on said uniform compositional layer.
Claim 4
Dependent Claim 38 words
The method of growing a semiconductor heterostructure as recited in claim 1 further includes the steps of: growing an upper barrier layer on said quantum well structure; and growing an upper superlattice structure on said upper barrier layer.
Claim 5
Dependent Claim 26 words
The method of growing a semiconductor heterostructure as recited in claim 3 further includes the step of: growing a cap layer on said upper superlattice structure.
Claim 6
Dependent Claim 19 words
The method of growing a semiconductor heterostructure as recited in claim 1 wherein: said superlattice structure is strain symmetrized.
Claim 7
Independent Claim 219 words
A method of fabricating a bandgap tunable semiconductor heterostructure, comprising the steps of: providing a substrate; growing a buffer layer of semiconducting material on said substrate wherein said buffer layer is lattice-mismatched relative to said substrate and has a thickness greater than a critical thickness; growing a strained superlattice structure on said buffer layer wherein said provided substrate, said buffer layer, and said superlattice structure together form an effective substrate; growing an unstrained barrier layer on said superlattice structure; forming on said unstrained barrier layer a quantum well structure serving as an active region wherein said quantum well structure has an alloy composition, and wherein a lattice constant mismatch between said quantum well structure and said barrier layer is smaller than the lattice constant mismatch between said quantum well structure and said provided substrate so that only a fraction of the stress due to the large mismatch between said quantum well structure and said provided substrate is accommodated by coherent strain in said quantum well structure, while the remainder of said stress is relieved in said effective substrate through the formation of misfit dislocations spatially separated from said quantum well structure; and prior to the step of forming said quantum well structure, selecting an appropriate alloy composition for said quantum well structure which corresponds to a desired bandgap value.
Claim 8
Independent Claim 219 words
A method of fabricating a bandgap tunable semiconductor heterostructure, comprising the steps of: providing a substrate; growing a buffer layer of semiconducting material on said substrate wherein said buffer layer is lattice-mismatched relative to said substrate and has a thickness greater than a critical thickness; growing a strained superlattice structure on said buffer layer wherein said provided substrate, said buffer layer, and said superlattice structure together form an effective substrate; growing an unstrained barrier layer on said superlattice structure; forming on said unstrained barrier layer a quantum well structure serving as an active region wherein said quantum well structure has an alloy composition, and wherein a lattice constant mismatch between said quantum well structure and said barrier layer is smaller than the lattice constant mismatch between said quantum well structure and said provided substrate so that only a fraction of the stress due to the large mismatch between said quantum well structure and said provided substrate is accommodated by coherent strain in said quantum well structure, while the remainder of said stress is relieved in said effective substrate through the formation of misfit dislocations spatially separated from said quantum well structure; and prior to the step of forming said quantum well structure, selecting an appropriate alloy composition for said quantum well structure which corresponds to a desired bandgap value.

References Cited (Backward Citations)

US4835583A Cited
US4769341A Cited
US4927471A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-06-03 1994-12-03 1995-06-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-06-03 1998-12-03 1999-06-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-06-03 2002-12-03 2003-06-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag