Patent US5005081A successfully refreshed from Google Patents.
US5005081A
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Method and apparatus for reducing noise in a video signal
Assignee: Sony Corp
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Filing: 1988-03-18
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Granted: 1991-04-02
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Expires: 2008-03-18
Abstract
Abstract A noise reduction circuit in which a first signal (S h2 ) is obtained by passing the input video signal (S I ) through a low frequency shut-off filter (10) and another a limiter (11), a second before signal (S H21 ) is obtained by passing the above obtained signal (S H2 ) through a field or frame delay circuit (5) and the difference between the two signals (S H2 - S H21 ) is subtracted from the above input video signal (S I ) so as not to lower the definition of image, the noise reduction circuit being capable of application in a television receiver etc.
Inventors
- 👤 Mitsuyasu Asano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 08:09
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N5/21
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
78 words
A method of reducing noise in a video signal, comprising: passing said video signal through a high pass filter to create a high frequency signal; passing said high frequency signal through a limiter to produce a first signal; delaying said first signal to produce a second signal; subtracting said second signal from said first signal to produce a difference signal; subtracting said difference signal from said video signal such that any noise in said video signal is reduced.
Claim 2
Independent Claim
78 words
A method of reducing noise in a video signal, comprising: passing said video signal through a high pass filter to create a high frequency signal; passing said high frequency signal through a limiter to produce a first signal; delaying said first signal to produce a second signal; subtracting said second signal from said first signal to produce a difference signal; subtracting said difference signal from said video signal such that any noise in said video signal is reduced.
Claim 3
Dependent Claim
27 words
A method according to claim 1 in which the step of delaying said first signal further comprises using a field delay circuit to delay said first signal.
Claim 4
Dependent Claim
27 words
A method according to claim 1 in which the step of delaying said first signal further comprises using a frame delay circuit to delay said first signal.
Claim 5
Dependent Claim
52 words
A method according to claim 1 further comprising the steps of converting said first signal from an analog signal to a digital signal prior to delaying said first signal and converting said delayed signal from a digital signal to an analog signal prior to subtracting said second signal from said first signal.
Claim 6
Dependent Claim
88 words
A circuit for reducing noise in a video signal, comprising: a high pass filter through which said video signal is passed to produce a high frequency signal; a limiter through which said high frequency signal is passed to produce a first signal, means for delaying said first signal to produce a second signal; means for subtracting said second signal from said first signal to produce a difference signal; means for subtracting said difference signal from said video signal such that any noise in said video signal is reduced.
Claim 7
Dependent Claim
88 words
A circuit for reducing noise in a video signal, comprising: a high pass filter through which said video signal is passed to produce a high frequency signal; a limiter through which said high frequency signal is passed to produce a first signal, means for delaying said first signal to produce a second signal; means for subtracting said second signal from said first signal to produce a difference signal; means for subtracting said difference signal from said video signal such that any noise in said video signal is reduced.
Claim 8
Dependent Claim
20 words
A circuit according to claim 5 in which the means for delaying said first signal comprises a field delay circuit.
Claim 9
Dependent Claim
20 words
A circuit according to claim 5 in which the means for delaying said first signal comprises a frame delay circuit.
Claim 10
Dependent Claim
52 words
A circuit according to claim 5 further comprising an analog to digital converter located between said limiter and said means for delaying said first signal and a digital to analog converter located between said means for delaying said first signal and said means for subtracting said second signal from said first signal.
Claim 11
Independent Claim
100 words
A method of reducing noise in a video signal, comprising: passing the video signal through a high pass filter to create a high frequency signal; passing the high frequency signal through a limiter to produce a first signal; passing the first signal to a junction; delaying the signal present at the junction to produce a second signal; subtracting the second signal from the first signal to produce a difference signal; subtracting the difference signal from the first signal at the junction; and subtracting the difference signal from the video signal such that any noise in the video signal is reduced.
Claim 12
Independent Claim
100 words
A method of reducing noise in a video signal, comprising: passing the video signal through a high pass filter to create a high frequency signal; passing the high frequency signal through a limiter to produce a first signal; passing the first signal to a junction; delaying the signal present at the junction to produce a second signal; subtracting the second signal from the first signal to produce a difference signal; subtracting the difference signal from the first signal at the junction; and subtracting the difference signal from the video signal such that any noise in the video signal is reduced.
Claim 13
Dependent Claim
136 words
A circuit for reducing noise in a video signal, comprising: a high pass filter through which the video signal is passed to produce a high frequency signal; a limiter through which the high frequency signal is passed to produce a first signal; an adder having as one input the first signal and as an output a second signal; means for delaying the second signal to produce a third signal; means for subtracting the third signal from the first signal to produce a difference signal; means for providing the difference signal to said adder as a second and negative input such that the difference signal is subtracted from the first signal to produce the second signal; and means for subtracting the difference signal from the video signal such that any noise in the video signal is reduced.
Claim 14
Dependent Claim
136 words
A circuit for reducing noise in a video signal, comprising: a high pass filter through which the video signal is passed to produce a high frequency signal; a limiter through which the high frequency signal is passed to produce a first signal; an adder having as one input the first signal and as an output a second signal; means for delaying the second signal to produce a third signal; means for subtracting the third signal from the first signal to produce a difference signal; means for providing the difference signal to said adder as a second and negative input such that the difference signal is subtracted from the first signal to produce the second signal; and means for subtracting the difference signal from the video signal such that any noise in the video signal is reduced.
Claim 15
Dependent Claim
206 words
A circuit for reducing noise in a video signal, comprising: a high pass filter having an input and output, to which the video signal is input; a limiter having an input and output, the input of which is connected to the output of the high pass filter; a first adding means having two inputs and an output, one input of which is connected to the output of the limiter; delay means having an input and output, the input of which is connected to the output of the first adding means; a second adding means having two inputs and an output, one input of which is connected to the output of the limiter and the other input of which is a negative input and is connected to the output of the delay means, and the output of which is connected to the second input of the first adding means as a negative input; a third adding means having two inputs and an output, one input of which is the video signal and the other input of which is a negative input and is connected to the output of the second adding means, and thus having as its output a video signal in which noise has been reduced.
Claim 16
Dependent Claim
206 words
A circuit for reducing noise in a video signal, comprising: a high pass filter having an input and output, to which the video signal is input; a limiter having an input and output, the input of which is connected to the output of the high pass filter; a first adding means having two inputs and an output, one input of which is connected to the output of the limiter; delay means having an input and output, the input of which is connected to the output of the first adding means; a second adding means having two inputs and an output, one input of which is connected to the output of the limiter and the other input of which is a negative input and is connected to the output of the delay means, and the output of which is connected to the second input of the first adding means as a negative input; a third adding means having two inputs and an output, one input of which is the video signal and the other input of which is a negative input and is connected to the output of the second adding means, and thus having as its output a video signal in which noise has been reduced.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-04-01 | 1994-10-01 | 1995-04-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-04-01 | 1998-10-01 | 1999-04-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-04-01 | 2002-10-01 | 2003-04-02 | $7700.00 | Window Closed / Lapsed |