US5003200A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Programmable logic device having programmable wiring for connecting adjacent programmable logic elements through a single switch station
Assignee: Kawasaki Microelectronics Inc
•
Filing: 1989-09-18
•
Granted: 1991-03-26
•
Expires: 2009-09-18
Abstract
Abstract There is provided a programmable logic device (PLD) which includes a programmable wiring, the programmable wiring comprising: a plurality of switch stations (SS), first wirings each for directly connecting some terminals among input/output terminals of said SSs to input/output terminals of adjacent programmable logic elements (PLE), and second wirings each for directly connecting some terminals among the input/output terminals of said SSs to input/output terminals of the adjacent SS. Hereby, the numbers of involved switches, through which associated signals pass, can be reduced.
Inventors
- 👤 Makoto Sakamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:34
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17736; H03K19/17704
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
119 words
A programmable logic device including a plurality of programmable logic elements connected to each other through a programmable wiring, said programmable wiring comprising: a plurality of switch stations each having a plurality of input/output terminals, each switch station including therein switch elements each for interconnecting said input/output terminals; first wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to input/output terminals of adjacent logic elements such that a plurality of adjacent programmable logic elements are connectable through a single one of said switch stations; and second wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to the input/output terminals of adjacent switch stations.
Claim 2
Dependent Claim
119 words
A programmable logic device including a plurality of programmable logic elements connected to each other through a programmable wiring, said programmable wiring comprising: a plurality of switch stations each having a plurality of input/output terminals, each switch station including therein switch elements each for interconnecting said input/output terminals; first wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to input/output terminals of adjacent logic elements such that a plurality of adjacent programmable logic elements are connectable through a single one of said switch stations; and second wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to the input/output terminals of adjacent switch stations.
Claim 3
Dependent Claim
23 words
A programmable logic device according to claim 1 wherein said first wirings and said second wirings have directional orientations different from each other.
Claim 4
Dependent Claim
24 words
A programmable logic device according to claim 1 wherein said switch station comprises a plurality of switch elements for implementing a predetermined switch table.
Claim 5
Dependent Claim
56 words
A programmable logic device according to claim 1 wherein said programmable logic element is a sequential circuit which comprises a combined logic circuit, into which any general purpose input is inputted, and a flip-flop for delaying a combined logical output from said combined logic circuit in response to a clock signal to generate a delayed output.
Claim 6
Dependent Claim
153 words
A programmable logic device including a plurality of programmable logic elements connected to each other through a programmable wiring, said programmable wiring comprising: a plurality of programmable logic elements, each of said programmable logic elements forming a sequential circuit comprising: a combined logic circuit into which any general purpose input is inputted; a flip-flop for delaying a combined logical output from said combined logic circuit in response to a clock signal to generate a delayed output; a plurality of switch stations each having a plurality of input/output terminals, each switch station including therein switch elements each for interconnecting said input/output terminals; first wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to input/output terminals of adjacent logic elements; and second wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to the input/output terminals of adjacent switch stations.
Claim 7
Dependent Claim
153 words
A programmable logic device including a plurality of programmable logic elements connected to each other through a programmable wiring, said programmable wiring comprising: a plurality of programmable logic elements, each of said programmable logic elements forming a sequential circuit comprising: a combined logic circuit into which any general purpose input is inputted; a flip-flop for delaying a combined logical output from said combined logic circuit in response to a clock signal to generate a delayed output; a plurality of switch stations each having a plurality of input/output terminals, each switch station including therein switch elements each for interconnecting said input/output terminals; first wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to input/output terminals of adjacent logic elements; and second wirings each for exclusively and directly connecting some terminals among said input/output terminals of said switch stations to the input/output terminals of adjacent switch stations.
References Cited (Backward Citations)
US4293735A
Cited
US4670749A
Cited
US4642487A
Cited
EP0177261B1
Cited
EP0204034A2
Cited
US4758745A
Cited
US4857774A
Cited
US4758745B1
Cited
US4786904A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-03-25 | 1994-09-24 | 1995-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-03-25 | 1998-09-24 | 1999-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-03-25 | 2002-09-24 | 2003-03-26 | $7700.00 | Window Closed / Lapsed |