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Digitally settable frequency divider, especially for a frequency synthesizer

Assignee: Wandel and Golterman GmbH and Co
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Filing: 1989-07-11
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Granted: 1991-02-26
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Expires: 2009-07-11
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Abstract

Abstract A frequency divider circuit, especially for use in frequency synthesizers, in which the frequency divider is provided with whole-number division factors, permits intergrator, differentiator and/or phase accumulations to be used to generate the successive values of the division factor which average, over time to allow fractional frequency division.

Inventors

  • 👤 Georg Rudolph

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 12:23
CPC Classifications
H; H03; H03K; H03K23/00; H03K23/64; H03K23/66; H03K23/667; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/197; H03L7/1974; H03L7/1976

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 316 words
In a frequency divider method for generating a frequency f T from a given frequency f O with a frequency divider settable only to whole-number divisor factors m and wherein on the average for a whole or fractional frequency division ratio is realized by a new setting of m to correspond to a frequency-setting information datum, a control circuit being provided which includes a phase accumulator applied with the fractional component of the frequency-setting datum and clocked by the divider output signal f T or a signal synchronous therewith and for each frequency-division cycle a new value m is supplied, the sequence of frequency-divider factors m being calculated in real time or read from a memory when the sequence is periodic and the terms of the sequence each have two components of which a first component is constituted of the sum of the whole parts of the frequency-setting information F and is a transfer from the phase accumulator, a second of said components being calculated from the stored contents of the phase accumulator, the improvement which comprises calculating the second component, in order to reduce the spectral part of the phase perturbations falling in the vicinity of f T in consideration of the more remote spectral parts and an increase in the absolute value of the phase perturbations to greater than 2(n-1) periods 1/f O measured peak-to-peak, with the following steps: integrating the contents of the phase accumulator n times, where n=2, 3, .... , in digital integrators with the input x and the output y defined by the recursion formula y(i)=y(i-1)+x(i) to provide an integrated result; cutting off said integrated result to yield an integer value; and differentiating the integer value n+1 times in digital differentiators with the input x and the output y defined by the formula y(i)=x(i)-x(i-1), the integrators, the differentiators and the phase accumulator being operated synchronously with the same computing cycle.
Claim 2
Dependent Claim 316 words
In a frequency divider method for generating a frequency f T from a given frequency f O with a frequency divider settable only to whole-number divisor factors m and wherein on the average for a whole or fractional frequency division ratio is realized by a new setting of m to correspond to a frequency-setting information datum, a control circuit being provided which includes a phase accumulator applied with the fractional component of the frequency-setting datum and clocked by the divider output signal f T or a signal synchronous therewith and for each frequency-division cycle a new value m is supplied, the sequence of frequency-divider factors m being calculated in real time or read from a memory when the sequence is periodic and the terms of the sequence each have two components of which a first component is constituted of the sum of the whole parts of the frequency-setting information F and is a transfer from the phase accumulator, a second of said components being calculated from the stored contents of the phase accumulator, the improvement which comprises calculating the second component, in order to reduce the spectral part of the phase perturbations falling in the vicinity of f T in consideration of the more remote spectral parts and an increase in the absolute value of the phase perturbations to greater than 2(n-1) periods 1/f O measured peak-to-peak, with the following steps: integrating the contents of the phase accumulator n times, where n=2, 3, .... , in digital integrators with the input x and the output y defined by the recursion formula y(i)=y(i-1)+x(i) to provide an integrated result; cutting off said integrated result to yield an integer value; and differentiating the integer value n+1 times in digital differentiators with the input x and the output y defined by the formula y(i)=x(i)-x(i-1), the integrators, the differentiators and the phase accumulator being operated synchronously with the same computing cycle.
Claim 3
Dependent Claim 26 words
The frequency divider method defined in claim 1 wherein the integrated value is calculated with a reduced word length by operating upon a fractional part thereof.
Claim 4
Dependent Claim 34 words
The frequency divider method defined in claim 1 wherein the contents of the phase accumulator n is integrated in at least two integrators and the integrated value is differentiated in at least three differentiators.
Claim 5
Dependent Claim 27 words
The frequency divider method defined in claim 2 wherein lower value settings of the fractional part of the integrated values are calculated at a reduced cycling frequency.
Claim 6
Dependent Claim 22 words
The frequency divider method defined in claim 1 which forms an adjustable frequency divider in a phase-control loop of a frequency synthesizer.
Claim 7
Dependent Claim 29 words
The frequency divider method defined in claim 1 which generates a frequency by dividing the frequency f O and subsequently subjects the divided frequency f T to pass-band filtration.
Claim 8
Dependent Claim 23 words
The frequency divider method defined in claim 1 wherein the integration is foreshortened with the differentiation for whole values of the integrated value.
Claim 9
Dependent Claim 314 words
In a frequency divider method for generating a frequency f T from a given frequency f O with a frequency divider settable only to whole-number divisor factors m and wherein on the average for a whole or fractional frequency division ratio is realized by a new setting of m to correspond to a frequency-setting information datum, a control circuit being provided which includes a phase accumulator supplied with the fractional component of the frequency-setting datum and clocked by the divider output signal f T or a signal synchronous therewith and for each frequency-division cycle a new value m is supplied, the sequence of frequency-divider factors m being calculated in real time or read from a memory when the sequence is periodic and the terms of the sequence each have two components of which a first component is constituted of the sum of the whole parts of the frequency-setting information F and is a transfer from the phase accumulator, a second of said components being calculated from the stored contents of the phase accumulator, the improvement which comprises calculating the second component, in order to reduce the spectral part of the phase perturbations falling in the vicinity of f T in consideration of the more remote spectral parts and an increase in the absolute value of the phase perturbations to greater than 2(n-1) periods 1/f O measured peak-to-peak, with the following steps: subjecting the contents of the phase accumulator to digital filtration with a transfer function having at least two poles and with f=0 and z=1 to provide an integrated result; cutting off said integrated result to yield an integer value; and subjecting the integer value to digital filtration with a filter function having integral coefficients and at least two zero crossings of a transfer function with f=0 and z=1, the digital filtrations and the phase accumulator being operated synchronously with the same computing cycle.
Claim 10
Dependent Claim 314 words
In a frequency divider method for generating a frequency f T from a given frequency f O with a frequency divider settable only to whole-number divisor factors m and wherein on the average for a whole or fractional frequency division ratio is realized by a new setting of m to correspond to a frequency-setting information datum, a control circuit being provided which includes a phase accumulator supplied with the fractional component of the frequency-setting datum and clocked by the divider output signal f T or a signal synchronous therewith and for each frequency-division cycle a new value m is supplied, the sequence of frequency-divider factors m being calculated in real time or read from a memory when the sequence is periodic and the terms of the sequence each have two components of which a first component is constituted of the sum of the whole parts of the frequency-setting information F and is a transfer from the phase accumulator, a second of said components being calculated from the stored contents of the phase accumulator, the improvement which comprises calculating the second component, in order to reduce the spectral part of the phase perturbations falling in the vicinity of f T in consideration of the more remote spectral parts and an increase in the absolute value of the phase perturbations to greater than 2(n-1) periods 1/f O measured peak-to-peak, with the following steps: subjecting the contents of the phase accumulator to digital filtration with a transfer function having at least two poles and with f=0 and z=1 to provide an integrated result; cutting off said integrated result to yield an integer value; and subjecting the integer value to digital filtration with a filter function having integral coefficients and at least two zero crossings of a transfer function with f=0 and z=1, the digital filtrations and the phase accumulator being operated synchronously with the same computing cycle.
Claim 11
Dependent Claim 323 words
A frequency divider circuit for generating a frequency f T from a given frequency f O , comprising: a frequency divider settable only to whole-number divisor factors m and wherein on the average for a whole or fractional frequency division ratio is realized by a new setting of m to correspond to a frequency-setting information datum; and a control circuit including a phase accumulator operatively connected to said frequency divider and supplied with the fractional component of the frequency-setting information datum and clocked by the divider output signal f T or a signal synchronous therewith and for each frequency-division cycle supplying a new value m, the sequence of frequency-divider factors m being calculated in real time or read from a memory when the sequence is periodic and the terms of the sequence each having two components of which a first component is constituted of the sum of the whole parts of the frequency-setting information F and is a transfer from the phase accumulator,and of which a second component is calculated from the stored contents of the phase accumulator, said control means further comprising means whereby the second component, in order to reduce the spectral part of the phase perturbations falling in the vicinity of f T in consideration of the more remote spectral parts and an increase in the absolute value of the phase perturbations to greater than 2(n-1) periods 1/f O measured peak-to-peak, is calculated as follows: integrating the contents of the phase accumulator n times, where n=2, 3, .... , in digital integrators with the input x and the output y defined by the recursion formula y(i)=y(i-1)+x(i) to provide an integrated result; cutting off said integrated result to yield an integrated value; and differentiating the integrated value n+1 times in digital differentiators with the input x and the output y defined by the formula y(i)=x(i)+x(i-1), the integrators, the differentiators and the phase accumulator being operated synchronously with the same computing cycle.
Claim 12
Dependent Claim 323 words
A frequency divider circuit for generating a frequency f T from a given frequency f O , comprising: a frequency divider settable only to whole-number divisor factors m and wherein on the average for a whole or fractional frequency division ratio is realized by a new setting of m to correspond to a frequency-setting information datum; and a control circuit including a phase accumulator operatively connected to said frequency divider and supplied with the fractional component of the frequency-setting information datum and clocked by the divider output signal f T or a signal synchronous therewith and for each frequency-division cycle supplying a new value m, the sequence of frequency-divider factors m being calculated in real time or read from a memory when the sequence is periodic and the terms of the sequence each having two components of which a first component is constituted of the sum of the whole parts of the frequency-setting information F and is a transfer from the phase accumulator,and of which a second component is calculated from the stored contents of the phase accumulator, said control means further comprising means whereby the second component, in order to reduce the spectral part of the phase perturbations falling in the vicinity of f T in consideration of the more remote spectral parts and an increase in the absolute value of the phase perturbations to greater than 2(n-1) periods 1/f O measured peak-to-peak, is calculated as follows: integrating the contents of the phase accumulator n times, where n=2, 3, .... , in digital integrators with the input x and the output y defined by the recursion formula y(i)=y(i-1)+x(i) to provide an integrated result; cutting off said integrated result to yield an integrated value; and differentiating the integrated value n+1 times in digital differentiators with the input x and the output y defined by the formula y(i)=x(i)+x(i-1), the integrators, the differentiators and the phase accumulator being operated synchronously with the same computing cycle.
Claim 13
Dependent Claim 26 words
The frequency divider circuit defined in claim 9 wherein the integrated value is calculated with a reduced word length by operating upon a fractional part thereof.
Claim 14
Dependent Claim 35 words
The frequency divider circuit defined in claim 9 wherein the contents of the phase accumulator n is integrated in at least two integrators and the the integrated value is differentiated in at least three differentiators.
Claim 15
Dependent Claim 27 words
The frequency divider circuit defined in claim 10 wherein lower value settings of the fractional part of the integrated values are calculated at a reduced cycling frequency.
Claim 16
Dependent Claim 22 words
The frequency divider circuit defined in claim 9 which forms an adjustable frequency divider in a phase-control loop of a frequency synthesizer.
Claim 17
Dependent Claim 29 words
The frequency divider circuit defined in claim 9 which generates a frequency by dividing the frequency f O and subsequently subjects the divided frequency f T to pass-band filtration.
Claim 18
Dependent Claim 23 words
The frequency divider circuit defined in claim 9 wherein the integration is foreshortened with the differentiation for whole values of the integrated value.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-02-25 1994-08-27 1995-02-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-02-25 1998-08-27 1999-02-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-02-25 2002-08-27 2003-02-26 $7700.00 Window Closed / Lapsed

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