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US4992764A Expired / Lapsed US ⏱️ 0.0 years remaining

High-power FET circuit

Assignee: Hittite Microwave LLC
•
Filing: 1989-02-21
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Granted: 1991-02-12
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Expires: 2009-02-21
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Abstract

Abstract A power FET includes a substrate of semi-insulating material having a top side and a ground side; an FET fabricated on the ground side of the substrate; and conductor means in the substrate extending from the drain electrode and the gate electrode on the ground side to the top side of the substrate. A ground plane on the ground side of the substrate contacts the source electrode of the FET and is spaced from the gate and drain electrodes to form a dome for minimizing ground inductance and maximizing heat transfer from the FET independent of the thickness of the substrate.

Inventors

  • 👤 Yalcin Ayasli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 15:56
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/10; H10D; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/27; H10D64/311; H10D64/411; H10W20/00; H10W20/20

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 110 words
An FET circuit comprising: a substrate of semi-insulating material having a top side and a ground side; an FET including a drain electrode a gate electrode and source electrode fabricated on the ground side of said substrate; conductor means in said substrate extending from said drain electrode and said gate electrode on said ground side to the top side of said substrate; and a ground plane on the ground side of said substrate contacting the source electrode of said FET and spaced from said gate and drain electrodes to form a dome for minimizing ground inductance and maximizing heat transfer from the FET independent of the thickness of the substrate.
Claim 2
Dependent Claim 110 words
An FET circuit comprising: a substrate of semi-insulating material having a top side and a ground side; an FET including a drain electrode a gate electrode and source electrode fabricated on the ground side of said substrate; conductor means in said substrate extending from said drain electrode and said gate electrode on said ground side to the top side of said substrate; and a ground plane on the ground side of said substrate contacting the source electrode of said FET and spaced from said gate and drain electrodes to form a dome for minimizing ground inductance and maximizing heat transfer from the FET independent of the thickness of the substrate.
Claim 3
Dependent Claim 12 words
The FET circuit of claim 1 in which said dome contains air.
Claim 4
Dependent Claim 15 words
The FET circuit of claim 1 in which said dome contains an electrically insulating material.
Claim 5
Dependent Claim 130 words
A monolithic microwave integrated FET circuit comprising: a substrate of semi-insulating material having a top side and a ground side; a passive RF circuit on said top side; an FET including a drain electrode, a gate electrode and source electrode fabricated on the ground side of said substrate; conductor means in said substrate extending from said drain electrode and said gate electrode on said ground side to the top side of said substrate; and a ground plane on the ground side of said substrate contacting the source electrode of said FET and spaced from said gate and drain electrodes to form a dome for minimizing ground inductance and maximizing heat transfer from the FET independent of the thickness of the substrate and decoupled from said RF circuit impedance matching constraints.
Claim 6
Dependent Claim 130 words
A monolithic microwave integrated FET circuit comprising: a substrate of semi-insulating material having a top side and a ground side; a passive RF circuit on said top side; an FET including a drain electrode, a gate electrode and source electrode fabricated on the ground side of said substrate; conductor means in said substrate extending from said drain electrode and said gate electrode on said ground side to the top side of said substrate; and a ground plane on the ground side of said substrate contacting the source electrode of said FET and spaced from said gate and drain electrodes to form a dome for minimizing ground inductance and maximizing heat transfer from the FET independent of the thickness of the substrate and decoupled from said RF circuit impedance matching constraints.
Claim 7
Independent Claim 86 words
A method of fabricating an FET circuit comprising: fabricating an FET including a drain electrode, a gate electrode and source electrode on the ground side of a substrate; constructing a conductive path from the drain and gate electrodes of the FET to the top side of the substrate; and establishing a ground plane on the ground side of the substrate with the ground plane contacting the source electrode and forming a dome over the drain and gate electrodes which electrically insulates them from the ground plane.
Claim 8
Independent Claim 86 words
A method of fabricating an FET circuit comprising: fabricating an FET including a drain electrode, a gate electrode and source electrode on the ground side of a substrate; constructing a conductive path from the drain and gate electrodes of the FET to the top side of the substrate; and establishing a ground plane on the ground side of the substrate with the ground plane contacting the source electrode and forming a dome over the drain and gate electrodes which electrically insulates them from the ground plane.
Claim 9
Dependent Claim 16 words
The method of claim 5 in which said dome is filled with an electrically insulating material.

References Cited (Backward Citations)

US4673958A Cited
US4624004A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-02-11 1994-08-13 1995-02-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-02-11 1998-08-13 1999-02-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-02-11 2002-08-13 2003-02-12 $7700.00 Window Closed / Lapsed

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