Semiconductor device of high breakdown voltage

Claim 2

A semiconductor device comprising: a semiconductor substrate of one conductivity type having a main surface, first and second source/drain regions of the opposite conductivity type formed spaced apart from each other on the main surface of said semiconductor substrate, said first source/drain region comprising a surface portion and a contiguous buried portion positioned below a portion of said main surface of said substrate located between said surface portion of said first source/drain region and said second source/drain region, a first gate oxide film deposited between said first and second source/drain regions on the main surface of said semiconductor substrate, a thick second gate oxide film overlying said buried portion of said first source/drain region and extending from said first gate oxide film to said surface portion of said first source/drain region, said buried portion of said first source/drain region continuing and extending from the surface portion of said first source/drain region on that side where said second gate oxide film is deposited to the lower side of, and in contact with a lower surface of, the second gate oxide film and, said buried portion of said first source/drain region having a two-layered structure of (i) a lower first doped layer in contact and contiguous with said surface portion having low impurity concentration and of the opposite conductivity type and (ii) an upper second doped layer located on and surrounded by said first doped layer whereby said second doped layer is separated from said surface portion by said first doped layer, said second doped layer of the opposite conductivity type and having an impurity concentration higher than that of the first doped layer, said buried portion of said first source/drain region extending below a lower surface of said surface portion of said first source/drain region, and a gate electrode extending from said first gate oxide film to the second oxide film and formed between the second source/drain region and the first source/drain region.

Claim 3

A semiconductor device according to claim 1, wherein the second oxide film and the buried portion of said first source/drain region are formed only on one side of said first and second source/drain regions.

Claim 4

A semiconductor device according to claim 1, wherein said second source/drain region includes adjacent surface and buried portions, said buried portion of said second source/drain region positioned between said surface portion of said second source/drain region and said buried portion of said first source/drain region.

Claim 5

A semiconductor device according to claim 1, wherein said buried portion of said first source/drain region has said first doped layer connected to the first source/drain region and said second doped layer deposited between said first doped layer and said second oxide film.

Claim 6

A semiconductor device according to claim 1, wherein the impurity concentration is designed such that it becomes lower in the order of said surface portion of said first and second source/drain regions, said second doped layer and said first doped layer.

Claim 7

A semiconductor device according to claim 1, wherein impurity concentrations of regions said surface portion first source/drain region and said second and said first doped layers of said buried portion of said first source/drain regions are 3, 8 and 7 are substantially 10 20 , 10 18 and 10 17 , respectively.

Claim 8

A MOS transistor having a high breakdown voltage for use in a semiconductor device, said MOS transistor comprising: a semiconductor substrate (1) of a first conductivity type having a main surface and a channel region formed thereon; a first gate oxide film (4) formed on said main surface of said semiconductor substrate over said channel region; a second gate oxide film (5) formed adjacent said channel region and having a thickness greater than a thickness of said first gate oxide film (4), said second gate oxide film being in contact with and laterally extending continuously from one side end of said first gate oxide film (4), said second gate oxide film (5) having a bottom surface lying below a bottom surface of said first gate oxide film (4); first and second drain/source regions (2; 3,7,8) of a second conductivity type opposite said first conductivity type formed so that said channel region of said semiconductor substrate (1) is between said first and second drain/source regions, said first drain/source region (2) lying contiguous to one side end of said channel region at the opposite end side of said first gate oxide film (4), said second drain/source region (3,7,8) having a first region (8) formed under and contiguous to the bottom surface of said second gate oxide film (5), a second region (7) under said first region (8) and formed contiguous to the other side end of said channel region at one side end, and a third region (3) formed on said main surface of said semiconductor substrate (1) extending continually from the other side end of said second region (7), impurity concentrations of said first and second regions (8,7) being lower than an impurity concentration of said third region (3) and the impurity concentration of said first region (8) being higher than the impurity concentration of said second region (7); a gate electrode (6) formed on said first gate oxide film (4) and extending above at least a portion of said second gate oxide film (5); a first drain/source electrode (12a) connected to said first drain/source region (2); and a second drain/source electrode (12b) connected to said third region of said second drain/source region (3).

Claim 9

A MOS transistor having a high breakdown voltage for use in a semiconductor device, said MOS transistor comprising: a semiconductor substrate (1) of a first conductivity type having a main surface and a channel region formed thereon; a first gate oxide film (4) formed on said main surface of said semiconductor substrate over said channel region; a second gate oxide film (5) formed adjacent said channel region and having a thickness greater than a thickness of said first gate oxide film (4), said second gate oxide film being in contact with and laterally extending continuously from one side end of said first gate oxide film (4), said second gate oxide film (5) having a bottom surface lying below a bottom surface of said first gate oxide film (4); first and second drain/source regions (2; 3,7,8) of a second conductivity type opposite said first conductivity type formed so that said channel region of said semiconductor substrate (1) is between said first and second drain/source regions, said first drain/source region (2) lying contiguous to one side end of said channel region at the opposite end side of said first gate oxide film (4), said second drain/source region (3,7,8) having a first region (8) formed under and contiguous to the bottom surface of said second gate oxide film (5), a second region (7) under said first region (8) and formed contiguous to the other side end of said channel region at one side end, and a third region (3) formed on said main surface of said semiconductor substrate (1) extending continually from the other side end of said second region (7), impurity concentrations of said first and second regions (8,7) being lower than an impurity concentration of said third region (3) and the impurity concentration of said first region (8) being higher than the impurity concentration of said second region (7); a gate electrode (6) formed on said first gate oxide film (4) and extending above at least a portion of said second gate oxide film (5); a first drain/source electrode (12a) connected to said first drain/source region (2); and a second drain/source electrode (12b) connected to said third region of said second drain/source region (3).

Claim 10

A semiconductor device according to claim 1, wherein the first and second doped layers of said first source/drain region buried portion are doped with different impurities.