Patent US4989180A successfully refreshed from Google Patents.
US4989180A
Expired / Lapsed
US
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Dynamic memory with logic-in-refresh
Assignee: The University of Texas System
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Filing: 1989-03-10
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Granted: 1991-01-29
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Expires: 2009-03-10
Abstract
Abstract The invention is a dynamic storage device requiring periodic refresh, and including logical operation circuitry within the refresh circuitry. The individual storage positions of the storage device are periodically read by a refresh amplifier, and then a logical operation is performed on the refresh data before application to the write amplifier. This allows implementation of associative data base searching by cyclically executing a data compare operation within the refresh circuitry.
Inventors
- 👤 G. Jack Lipovski
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 21:46
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0866; G06F16/00; G06F16/90; G06F16/903; G06F16/90335; G06F16/90339; G06F7/00; G06F7/02; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406; G11C15/00; G11C15/04; G11C15/043; G11C7/00; G11C7/10; G11C7/1006; G06F2207/00; G06F2207/02; G06F2207/025
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
169 words
A data storage and logical operation apparatus comprising: dynamic data storage means, integrated on a single semiconductor material chip, for storing a plurality of words in adjacent word storage positions, said dynamic data storage means requiring refreshing in order to retain data; means, integrated on said single semiconductor material chip, for periodically refreshing said dynamic data storage means in order to retain a state of data in said dynamic data storage means, including means for cyclically refreshing said words in said adjacent storage positions; logic means, including a data comparator integrated on said single semiconductor material chip, connected to said means for cyclically refreshing, for comparing a predetermined comparand with each word stored in said adjacent word storage positions during refreshing, and for providing an indication of a match between said predetermined comparand and a target word; and means for setting at least one mark bit of a word in a word storage position adjacent a storage position of said target word, responsive to said indication of a match.
Claim 2
Dependent Claim
169 words
A data storage and logical operation apparatus comprising: dynamic data storage means, integrated on a single semiconductor material chip, for storing a plurality of words in adjacent word storage positions, said dynamic data storage means requiring refreshing in order to retain data; means, integrated on said single semiconductor material chip, for periodically refreshing said dynamic data storage means in order to retain a state of data in said dynamic data storage means, including means for cyclically refreshing said words in said adjacent storage positions; logic means, including a data comparator integrated on said single semiconductor material chip, connected to said means for cyclically refreshing, for comparing a predetermined comparand with each word stored in said adjacent word storage positions during refreshing, and for providing an indication of a match between said predetermined comparand and a target word; and means for setting at least one mark bit of a word in a word storage position adjacent a storage position of said target word, responsive to said indication of a match.
Claim 3
Dependent Claim
153 words
A data storage and logical operation apparatus comprising: p1 dynamic data storage means, integrated on a single semiconductor material chip, for storing a plurality of words in adjacent word storage positions, said dynamic data storage means requiring refreshing in order to retain data; means, integrated on said single semiconductor material chip, for periodically refreshing said dynamic data storage means in order to retain a state of data in said dynamic data storage means, including means for cyclically refreshing said words in said adjacent storage positions; logic means, including a data comparator integrated on said single semiconductor material chip, connected to said means for cyclically refreshing, for comparing a predetermined comparand with each word stored in said adjacent word storage positions during refreshing, and for providing an indication of a match between said predetermined comparand and a target word; means for marking a respective target word upon to said indication of a match; and
Claim 4
Dependent Claim
153 words
A data storage and logical operation apparatus comprising: p1 dynamic data storage means, integrated on a single semiconductor material chip, for storing a plurality of words in adjacent word storage positions, said dynamic data storage means requiring refreshing in order to retain data; means, integrated on said single semiconductor material chip, for periodically refreshing said dynamic data storage means in order to retain a state of data in said dynamic data storage means, including means for cyclically refreshing said words in said adjacent storage positions; logic means, including a data comparator integrated on said single semiconductor material chip, connected to said means for cyclically refreshing, for comparing a predetermined comparand with each word stored in said adjacent word storage positions during refreshing, and for providing an indication of a match between said predetermined comparand and a target word; means for marking a respective target word upon to said indication of a match; and
Claim 5
Dependent Claim
211 words
A data storage and logical operation apparatus comprising: dynamic data storage means, integrated on a single semiconductor material chip, for storing a plurality of words in adjacent word storage positions; means, integrated on said single semiconductor material chip, for periodically refreshing said dynamic data storage means, including means for cyclically refreshing said words in said adjacent storage positions, said means for cyclically refreshing having means for reading each word, and means for writing each word after reading; logic means, including a data comparator integrated on said single semiconductor material chip, connected to said means for cyclically refreshing, for comparing a predetermined comparand with each word stored in said adjacent word storage positions during refreshing, and for providing an indication of a match between said predetermined comparand and a target word; and data multiplexer, integrated on said single semiconductor material chip, connected intermediate said means for reading and said means for writing, for selecting either data from said means for reading or data from an external data source for application to said means for writing, said data multiplexer having a first input connected to an output of said means for reading, a second input connected to said external data source, and an output connected to an input of said means for writing.
Claim 6
Dependent Claim
211 words
A data storage and logical operation apparatus comprising: dynamic data storage means, integrated on a single semiconductor material chip, for storing a plurality of words in adjacent word storage positions; means, integrated on said single semiconductor material chip, for periodically refreshing said dynamic data storage means, including means for cyclically refreshing said words in said adjacent storage positions, said means for cyclically refreshing having means for reading each word, and means for writing each word after reading; logic means, including a data comparator integrated on said single semiconductor material chip, connected to said means for cyclically refreshing, for comparing a predetermined comparand with each word stored in said adjacent word storage positions during refreshing, and for providing an indication of a match between said predetermined comparand and a target word; and data multiplexer, integrated on said single semiconductor material chip, connected intermediate said means for reading and said means for writing, for selecting either data from said means for reading or data from an external data source for application to said means for writing, said data multiplexer having a first input connected to an output of said means for reading, a second input connected to said external data source, and an output connected to an input of said means for writing.
Claim 7
Dependent Claim
161 words
A data storage device comprising: a plurality of dynamic data storage positions, integrated on a single chip of semiconductor material, for storing a respective plurality of data words; a data refreshing circuit, integrated on said single chip, including a read amplifier for cyclically reading said plurality of data words, and a write amplifier, connected to said read amplifier, for cyclically writing said plurality of data words; a data comparator, integrated on said single chip, connected intermediate said read amplifier and said write amplifier for cyclically comparing each of said plurality of data words with a predetermined comparand, and for providing an indication of comparison when said predetermined comparand matches at least one of said plurality of data words; and a data multiplexer, integrated on said single chip, connected intermediate said read amplifier and said write amplifier, for selecting a data word read by said read amplifier or a data word from an external data source, for application to said write amplifier.
Claim 8
Dependent Claim
161 words
A data storage device comprising: a plurality of dynamic data storage positions, integrated on a single chip of semiconductor material, for storing a respective plurality of data words; a data refreshing circuit, integrated on said single chip, including a read amplifier for cyclically reading said plurality of data words, and a write amplifier, connected to said read amplifier, for cyclically writing said plurality of data words; a data comparator, integrated on said single chip, connected intermediate said read amplifier and said write amplifier for cyclically comparing each of said plurality of data words with a predetermined comparand, and for providing an indication of comparison when said predetermined comparand matches at least one of said plurality of data words; and a data multiplexer, integrated on said single chip, connected intermediate said read amplifier and said write amplifier, for selecting a data word read by said read amplifier or a data word from an external data source, for application to said write amplifier.
Claim 9
Dependent Claim
19 words
The device of claim 4, further comprising: a comparand register, integrated on said single chip, for storing said comparand.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-28 | 1994-07-30 | 1995-01-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-28 | 1998-07-30 | 1999-01-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-28 | 2002-07-30 | 2003-01-29 | $7700.00 | Window Closed / Lapsed |