US4980753A — Low-cost high-performance semiconductor chip pack…

Claim 1

Independent Claim 177 words

A low-cost high-performance semiconductor ship package enabling a direct chip to printed circuit board connection, comprising: (a) a semiconductor chip having a front surface and back surface, the front surface comprising pads for input and output of signals to and from the chip; (b) a leadframe having power, ground, and signal conductive elements having first and second end portions for transmitting input and output signals to the pads; (c) bonding means for selectively directly connecting the first end portions of the leadframe conductive elements to the pads without use of intermediate packaging; and (d) protective means for providing sealed and environmental protection around the semiconductor chip and portions of the leadframe while permitting other portions of the leadframe to protrude from the protective means to provide connection with other devices, the protective means comprising chamber walls spaced away from the semiconductor chip and a portion of the leadframe adjacent the chip in order to permit independent thermal expansion cycling of the semiconductor chip, the portion of the leadframe surrounded by the chamber walls, and the protective means.

Claim 2

Dependent Claim 177 words

A low-cost high-performance semiconductor ship package enabling a direct chip to printed circuit board connection, comprising: (a) a semiconductor chip having a front surface and back surface, the front surface comprising pads for input and output of signals to and from the chip; (b) a leadframe having power, ground, and signal conductive elements having first and second end portions for transmitting input and output signals to the pads; (c) bonding means for selectively directly connecting the first end portions of the leadframe conductive elements to the pads without use of intermediate packaging; and (d) protective means for providing sealed and environmental protection around the semiconductor chip and portions of the leadframe while permitting other portions of the leadframe to protrude from the protective means to provide connection with other devices, the protective means comprising chamber walls spaced away from the semiconductor chip and a portion of the leadframe adjacent the chip in order to permit independent thermal expansion cycling of the semiconductor chip, the portion of the leadframe surrounded by the chamber walls, and the protective means.

Claim 3

Dependent Claim 17 words

A device according to claim 1 wherein the bonding means comprises a plurality of preformed solder bumps.

Claim 4

Dependent Claim 32 words

A device according to claim 1 wherein the chamber walls comprise first and second enclosure members forming a substantial portion of a chamber around the semiconductor chip and portions of the leadframe.

Claim 5

Dependent Claim 18 words

A device according to claim 1 wherein one of the enclosure members is a next level of packaging.

Claim 6

Dependent Claim 42 words

A device according to claim 1 wherein the leadframe comprises stress relief means positioned between the chamber walls and the semiconductor chip for relieving mechanical fatigue caused by thermal stress to the chip, the leadframe, and the protective means during thermal cycling.

Claim 7

Dependent Claim 42 words

A device according to claim 5 wherein the stress relief means comprises a stress relief expansion portion of the conductive elements configured for maintaining conductivity of signals passing from the leadframe to and from the chip independent of thermal cycling induced stresses.

Claim 8

Dependent Claim 26 words

A device according to claim 1 comprising means for connecting the second end portion of the conductive elements to a printed circuit board without intermediate packaging.

Claim 9

Dependent Claim 20 words

A device according to claim 1 wherein the chip back surface is bonded to a portion of the protective means.

Claim 10

Dependent Claim 24 words

A device according to claim 1 wherein the protective means comprises barrier sealing means for coating and protecting the semiconductor chip from environmental contamination.

Claim 11

Dependent Claim 173 words

A low-cost leadframe package, comprising: (a) a semiconductor chip having pads for input and output of signals to and from the chip; (b) a leadframe having power, ground, and signal conductive elements for transmitting input and output signals to the pads; (c) bound means for selectively directly connecting the leadframe conductive elements to the pads without the use of intermediate packaging; and (d) protective means for providing sealed environmental protection around the semiconductor chip and portions of the leadframe while permitting other portions of the leadframe to protrude from the protective means to provide connection with other devices, the protective means comprising: (i) enclosure means comprising inner chamber walls spaced away from the semiconductor chip to permit independent thermal expansion cycling of the semiconductor chip, a portion of the leadframe surrounded by the chamber walls, and the enclosure means; and (ii) stress relief means positioned between the chamber walls and the semiconductor chip for relieving mechanical fatigue caused by thermal stress to the chip, the leadframe, and the protective means during thermal cycling.

Claim 12

Dependent Claim 173 words

A low-cost leadframe package, comprising: (a) a semiconductor chip having pads for input and output of signals to and from the chip; (b) a leadframe having power, ground, and signal conductive elements for transmitting input and output signals to the pads; (c) bound means for selectively directly connecting the leadframe conductive elements to the pads without the use of intermediate packaging; and (d) protective means for providing sealed environmental protection around the semiconductor chip and portions of the leadframe while permitting other portions of the leadframe to protrude from the protective means to provide connection with other devices, the protective means comprising: (i) enclosure means comprising inner chamber walls spaced away from the semiconductor chip to permit independent thermal expansion cycling of the semiconductor chip, a portion of the leadframe surrounded by the chamber walls, and the enclosure means; and (ii) stress relief means positioned between the chamber walls and the semiconductor chip for relieving mechanical fatigue caused by thermal stress to the chip, the leadframe, and the protective means during thermal cycling.

Claim 13

Dependent Claim 32 words

A device according to claim 10 wherein the chamber walls comprise first and second enclosure members forming a substantial portion of a chamber around the semiconductor chip and portions of the leadframe.

Claim 14

Dependent Claim 42 words

A device according to claim 10 wherein the stress relief means comprises a stress relief expansion portion of the conductive elements configured for maintaining conductivity of signals passing from the leadframe to and from the chip independent of thermal cycling induced stresses.

Claim 15

Dependent Claim 24 words

A device according to claim 10 wherein the protective means comprises barrier sealing means for coating and protecting the semiconductor chip from environmental contamination.

Claim 16

Dependent Claim 14 words

A device according to claim 13 wherein the barrier sealing means comprises polyimide-amide material.

Claim 17

Dependent Claim 14 words

A device according to claim 10 wherein the bonding means comprises solder bump material.

Claim 18

Dependent Claim 15 words

A device according to claim 15 wherein the solder bump material comprises tin and lead.

Claim 19

Dependent Claim 32 words

A device according to claim 10 wherein the semiconductor chip comprises a front side for the chip pads and a back side configured for bonding to a portion of the protective means.

Claim 20

Dependent Claim 182 words

A high density low cost leadframe package enabling direct connection with a printed circuit board comprising: (a) a semiconductor chip having fine pitch bonding pads with a pattern repetition of substantially less than 0.02 inch (51 mm) for input and output of signals to and from the chip; (b) a leadframe having fine pitch power, ground, and signal conductive elements for transmitting input and output signals to the bonding pads; (c) bonding means comprising a plurality of solder bumps for selectively directly connecting the fine pitch leadframe conductive elements to the fine pitch pads without the use of intermediate packaging; and (d) protective means for providing sealed and environmental protection around the semiconductor chip and portions of the leadframe while permitting other portions of the leadframe to protrude from the protective means to provide connection with other devices, the protective means comprising chamber walls spaced away from the semiconductor chip and a portion of the leadframe agent in the chip to permit independent thermal expansion cycling of the semiconductor chip, the portion of the leadframe adjacent the chip and the protective means.

Claim 21

Dependent Claim 182 words

A high density low cost leadframe package enabling direct connection with a printed circuit board comprising: (a) a semiconductor chip having fine pitch bonding pads with a pattern repetition of substantially less than 0.02 inch (51 mm) for input and output of signals to and from the chip; (b) a leadframe having fine pitch power, ground, and signal conductive elements for transmitting input and output signals to the bonding pads; (c) bonding means comprising a plurality of solder bumps for selectively directly connecting the fine pitch leadframe conductive elements to the fine pitch pads without the use of intermediate packaging; and (d) protective means for providing sealed and environmental protection around the semiconductor chip and portions of the leadframe while permitting other portions of the leadframe to protrude from the protective means to provide connection with other devices, the protective means comprising chamber walls spaced away from the semiconductor chip and a portion of the leadframe agent in the chip to permit independent thermal expansion cycling of the semiconductor chip, the portion of the leadframe adjacent the chip and the protective means.

Claim 22

Dependent Claim 49 words

A device according to claim 18 wherein: (a) the protective means comprises first and second enclosure members; and (b) the enclosure members comprise inner surfaces comprising the enclosure walls spaced away from the semiconductor chip to permit independent thermal expansion cycling of the semiconductor chip and the enclosure members.

Claim 23

Dependent Claim 35 words

A device according to claim 18 wherein the pads on the semiconductor chip and the leadframe conductive elements are spaced at a pitch of between about 0.003 inch (0.076 mm) and 0.008 inch (0.203 mm).

Claim 24

Dependent Claim 15 words

A device according to claim 18 wherein the protective means comprises a non-conductive adhesive sealant.

Claim 25

Dependent Claim 40 words

A device according to claim 18 wherein the portions of the conductive elements within the leadframe which extend outside the protective means are spaced at a pitch of between about 0.004 inch (0.102 mm) and about 0.010 inch (0.254 mm).

Claim 26

Dependent Claim 173 words

A low cost and low force bonded leadframe package, comprising: (a) a semiconductor chip having pads for input and output of signals to and from the chip; (b) a leadframe having power, ground, and signal conductive elements for transmitting input and output signals to the pads; (c) low force bonding means for selectively directly connecting the leadframe conductive elements to the pads without inducing passivation cracking in the semiconductor chip, the direct connection between the leadframe conductive elements and the chip pads being made without intermediate packaging; and (d) protective means for providing sealed and environmental protection around the semiconductor chip and a portion of the leadframe adjacent the chip while permitting other portions of the leadframe to protrude from the protective means for connection with other devices, the protective means comprising chamber walls spaced away from the semiconductor chip and a portion of the leadframe adjacent the chip in order to permit independent thermal expansion cycling of the semiconductor chip, the portion of the leadframe adjacent the chip, and the protective means.

Claim 27

Dependent Claim 173 words

A low cost and low force bonded leadframe package, comprising: (a) a semiconductor chip having pads for input and output of signals to and from the chip; (b) a leadframe having power, ground, and signal conductive elements for transmitting input and output signals to the pads; (c) low force bonding means for selectively directly connecting the leadframe conductive elements to the pads without inducing passivation cracking in the semiconductor chip, the direct connection between the leadframe conductive elements and the chip pads being made without intermediate packaging; and (d) protective means for providing sealed and environmental protection around the semiconductor chip and a portion of the leadframe adjacent the chip while permitting other portions of the leadframe to protrude from the protective means for connection with other devices, the protective means comprising chamber walls spaced away from the semiconductor chip and a portion of the leadframe adjacent the chip in order to permit independent thermal expansion cycling of the semiconductor chip, the portion of the leadframe adjacent the chip, and the protective means.

Claim 28

Dependent Claim 17 words

A device according to claim 23 wherein the low force bonding means comprises reflow solder bonding material.

Claim 29

Dependent Claim 18 words

A device according to claim 23 wherein the low force bonding means comprises a plurality of solder bumps.

Claim 30

Dependent Claim 21 words

A device according to claim 25 wherein the solder bumps comprise preformed solder bumps originally located on the leadframe conductive elements.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1993-12-24	1994-06-25	1994-12-25	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1997-12-24	1998-06-25	1998-12-25	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2001-12-24	2002-06-25	2002-12-25	$7700.00	Window Closed / Lapsed

Low-cost high-performance semiconductor chip package

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