Patent US4972097A successfully refreshed from Google Patents.
US4972097A
Expired / Lapsed
US
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Reference voltage generating circuit in semiconductor device
Assignee: Samsung Electronics Co Ltd
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Filing: 1989-04-20
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Granted: 1990-11-20
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Expires: 2009-04-20
Abstract
Abstract The reference voltage generating circuit in this invention for generating a constant reference voltage in a semiconductor device, is provided with a low voltage applying line for applying to the circuit a voltage less than a supply voltage, standby current controlling means connected to said low voltage applying line for reducing greatly the standby current flowing in the circuit, a resistance component connected to said standby current controlling means for forming said reference voltage, a reference voltage output line connected to a connection node between said standby current controlling means and said resistance component, and initial voltage forming means connected in parallel with said standby current controlling means between said low voltage applying line and said reference voltage output line.
Inventors
- 👤 Jei H. You
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 05:20
CPC Classifications
H; H02; H02M; H02M1/00; H02M1/08; H02M1/088; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
137 words
A circuit for generating a constant reference voltage in a semiconductor device, the circuit comprising: a low voltage applying line for applying to the circuit a voltage less than a supply voltage; standby current controlling means connected to said low voltage applying line for reducing standby current flowing in the circuit; a resistance component connected to said standby current controlling means for forming said reference voltage, said constant referent voltage formed by a voltage appearing across said resistance component; a reference voltage output line connected to a connecting node between said standby current controlling means and said resistance component; and initial voltage forming means connected in parallel with said standby current controlling means between said low voltage applying line and said reference voltage output line for forming an initial voltage level to said low voltage applying line.
Claim 2
Dependent Claim
137 words
A circuit for generating a constant reference voltage in a semiconductor device, the circuit comprising: a low voltage applying line for applying to the circuit a voltage less than a supply voltage; standby current controlling means connected to said low voltage applying line for reducing standby current flowing in the circuit; a resistance component connected to said standby current controlling means for forming said reference voltage, said constant referent voltage formed by a voltage appearing across said resistance component; a reference voltage output line connected to a connecting node between said standby current controlling means and said resistance component; and initial voltage forming means connected in parallel with said standby current controlling means between said low voltage applying line and said reference voltage output line for forming an initial voltage level to said low voltage applying line.
Claim 3
Dependent Claim
23 words
A circuit according to claim 1, wherein said standby current controlling means comprises first and second MOS transistors which form a series path.
Claim 4
Dependent Claim
92 words
A circuit according to claim 2, wherein said first and second MOS transistors are enhancement-mode P type MOS transistors, said first MOS transistor having a drain in electrical connection with said low voltage applying line and having a gate in electrical connection with a ground voltage and having a source in electrical connection with a drain of said second MOS transistor, said second MOS transistor having a gate thereof in electrical connection with the ground voltage said second MOS transistor having a source in electrical connection with the reference voltage output line.
Claim 5
Dependent Claim
22 words
A circuit according to claim 2, wherein said resistance component comprises third, fourth and fifth MOS transistors which form a series path.
Claim 6
Dependent Claim
126 words
A circuit according to claim 4, wherein said third MOS transistor is an enhancement-mode P type MOS transistor and said fourth and fifth MOS transistors are enhancement-mode N type MOS transistors, said third MOS transistor having a drain in electrical connection with said reference voltage output line and having a gate in electrical connection with a ground voltage and having a source in electrical connection with a drain of said fourth transistor, said fourth MOS transistor having a gate in electrical connection with the drain thereof and having a source in electrical connection with a drain of said fifth MOS transistor, said fifth MOS transistor having a gate in electrical connection with the drain thereof and having a source in electrical connection with the ground voltage.
Claim 7
Dependent Claim
17 words
A circuit according to claim 4, wherein said initial voltage forming means comprises a sixth MOS transistor.
Claim 8
Dependent Claim
52 words
A circuit according to claim 6, wherein said sixth MOS transistor is an enhancement-mode N type MOS transistor, said sixth MOS transistor having a drain in electrical connection with said low voltage applying line and with a gate thereof and having a source in electrical connection with said reference voltage output line.
Claim 9
Dependent Claim
22 words
A circuit according to claim 1, wherein the voltage on said low voltage applying line is a half of the supply voltage.
Claim 10
Dependent Claim
17 words
A circuit according to claim 1, wherein said initial voltage forming means comprises an N MOS transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-11-19 | 1994-05-21 | 1994-11-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-11-19 | 1998-05-21 | 1998-11-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-11-19 | 2002-05-21 | 2002-11-20 | $7700.00 | Window Closed / Lapsed |