US4970568A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and a process for producing a semiconductor device
Assignee: Fujitsu Ltd
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Filing: 1989-06-30
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Granted: 1990-11-13
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Expires: 2009-06-30
Abstract
Abstract The present invention relates to semiconductor device, a e.g., a CMOS, comprising a denuded region and a bulk-defect region, as well as the process for producing, e.g., a CMOS. In a conventional CMOS, the distance (dp) between the bulk-defect region and P + -type source of drain region--(dp)--is greater than the distance (dn) between the bulk--defect--region and the P well--(dn)--. As a result, a leakage current can be generated in the PN junction. In order to eliminate the problems caused due to dp>dn, the present invention forms in a--semiconductor-substrate a bulk-defect region having a depth which is nonuniform in accordance with the nonuniform depth of the semiconductor elements.
Inventors
- 👤 Takao Hiraguchi
- 👤 Kazunori Imaoka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 05:56
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/83; H10D62/834; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0193; H10D84/02; H10D84/03; H10D84/038; H10P; H10P36/00; H10P36/20; H10W; H10W42/00; H10W42/20; H10W42/25; Y; Y10; Y10S; Y10S148/00; Y10S148/024; Y10S148/127
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
292 words
A semiconductor device having an active region having a predetermined depth and including region carriers, comprising: a semiconductor substrate having a main surface; a defect-free surface region being formed continuously at said main surface of said semiconductor substrate, said defect-free surface region having a bottom face which is non-uniform in depth when measured from said main surface, said bottom face being determined by a first conducting region having a first depth measured from said main surface of said defect-free surface region and a second conducting region having a second depth deeper than that of the first depth; a plurality of semiconductor elements, formed in said defect-free surface region, each depth of said semiconductor elements being non-uniform when measured from said main surface, said semiconductor elements having a conductivity type opposite to that of said semiconductor substrate; and a bulk-defect region having the same conductivity type as that of said semiconductor substrate, formed substantially continuously in said semiconductor substrate and under said defect-free surface region, said bulk-defect region having an upper face adjacent said bottom face of said defect-free region and positioned at a non-uniform depth when measured from said main surface at which said defect-free region is formed, said non-uniform depth of the upper face of said bulk defect region corresponding to the non-uniform depth of said semiconductor elements, the upper face of said bulk-defect region being positioned at a third depth which is spaced at a predetermined distance from the bottom face of said first conducting region and being positioned at a fourth depth which is spaced at a predetermined distance from the bottom face of said second conducting region, and said fourth depth being deeper than said third depth when measured from said main surface of said defect-free surface region.
Claim 2
Dependent Claim
292 words
A semiconductor device having an active region having a predetermined depth and including region carriers, comprising: a semiconductor substrate having a main surface; a defect-free surface region being formed continuously at said main surface of said semiconductor substrate, said defect-free surface region having a bottom face which is non-uniform in depth when measured from said main surface, said bottom face being determined by a first conducting region having a first depth measured from said main surface of said defect-free surface region and a second conducting region having a second depth deeper than that of the first depth; a plurality of semiconductor elements, formed in said defect-free surface region, each depth of said semiconductor elements being non-uniform when measured from said main surface, said semiconductor elements having a conductivity type opposite to that of said semiconductor substrate; and a bulk-defect region having the same conductivity type as that of said semiconductor substrate, formed substantially continuously in said semiconductor substrate and under said defect-free surface region, said bulk-defect region having an upper face adjacent said bottom face of said defect-free region and positioned at a non-uniform depth when measured from said main surface at which said defect-free region is formed, said non-uniform depth of the upper face of said bulk defect region corresponding to the non-uniform depth of said semiconductor elements, the upper face of said bulk-defect region being positioned at a third depth which is spaced at a predetermined distance from the bottom face of said first conducting region and being positioned at a fourth depth which is spaced at a predetermined distance from the bottom face of said second conducting region, and said fourth depth being deeper than said third depth when measured from said main surface of said defect-free surface region.
Claim 3
Dependent Claim
30 words
A semiconductor device according to claim 1, wherein said semiconductor elements comprise a pair of regions having first and second regions having different conductivity types and forming a PN junction.
Claim 4
Dependent Claim
45 words
A semiconductor device according to claim 2, wherein the depth of said bulk-defect region is determined in accordance with the depth of the active region, and wherein the region carriers flow from one or more of said semiconductor elements during energization of the semiconductor device.
Claim 5
Dependent Claim
40 words
A semiconductor device according to claim 1, further comprising a depletion layer having a varying depth, formed surrounding said semiconductor elements, and wherein the depth of said bulk-defect region is determined in accordance with the depth of the depletion layer.
Claim 6
Dependent Claim
16 words
A semiconductor device according to claim 1 or 4, wherein said semiconductor elements are bipolar transistors.
Claim 7
Dependent Claim
15 words
A semiconductor device according to claim 5, wherein said bipolar transistors comprise buried collector regions.
Claim 8
Dependent Claim
14 words
A semiconductor device according to claim 4, wherein said semiconductor elements are MOS transistors.
Claim 9
Dependent Claim
52 words
A semiconductor device according to claim 7, wherein each of said MOS transistors has a source and drain region, and wherein the depth of said bulk-defect region below the drain region of each of said MOS transistors is greater than the depth below the source region of each of said MOS transistors.
Claim 10
Dependent Claim
20 words
A semiconductor device according to claim 7 or 8, wherein said MOS transistors are CMOS's, each comprising a well region.
Claim 11
Dependent Claim
31 words
A semiconductor device according to claim 4, wherein the distance between said bulk-defect region and a portion of said depletion layer having the greatest depth, is from 2 to 30 microns.
References Cited (Backward Citations)
US3899793A
Cited
US3946425A
Cited
US3838440A
Cited
US4053925A
Cited
US4116719A
Cited
US4220483A
Cited
EP0023656A1
Cited
EP0030457A2
Cited
US4424526A
Cited
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