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US4967198A Expired / Lapsed US ⏱️ 0.0 years remaining

Serial-to-parallel analog CCD GaAs device

Assignee: Tektronix Inc
•
Filing: 1990-03-01
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Granted: 1990-10-30
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Expires: 2010-03-01
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Abstract

Abstract A serial-to-parallel analog CCD GaAs device provides high speed A/D or D/A conversion. A high speed analog signal is sampled by shifting the analog data serially into "n" CCD elements. Then a parallel load pulse transfers the analog data into multiple CCD holding elements. A bank of A/D converters converts the analog data. Conversely, the outputs of a bank of D/A converters are loaded in parallel into a serial CCD device of the "n" elements. The serial CCD device is shifted out serially to complete the conversion to an analog signal.

Inventors

  • 👤 Michael C. Seckora

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 23:54
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/662; H03M1/12; H03M1/1205; H03M1/121; H03M1/1215

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 193 words
A digital-to-analog conversion system including a storage device adapted for converting signal formats, comprising: a plurality of multiple bit digital-to-analog converters having output conductors, the converters operative for concurrently converting digital data into discrete analog data, such that each of the analog data has a magnitude that represents the weighted value of an input digital datum; a plurality of first storage elements interconnected to form a first linear array having an analog output; and a plurality of second storage elements arranged in a second linear array, the second storage elements having input conductors each one of which is coupled to a different one of the output conductors of the digital-to-analog converters to hold analog data transferred in parallel from the converters, the first storage elements operative for receiving discrete analog data from the second storage elements and continually shifting the analog data along the first linear array in accordance with sequences of clock pulses to provide an analog signal at the output of the first linear array, the second storage elements operative for holding the analog data transferred in parallel from the digital-to-analog converters at the end of each sequence of clock pulses.
Claim 2
Dependent Claim 193 words
A digital-to-analog conversion system including a storage device adapted for converting signal formats, comprising: a plurality of multiple bit digital-to-analog converters having output conductors, the converters operative for concurrently converting digital data into discrete analog data, such that each of the analog data has a magnitude that represents the weighted value of an input digital datum; a plurality of first storage elements interconnected to form a first linear array having an analog output; and a plurality of second storage elements arranged in a second linear array, the second storage elements having input conductors each one of which is coupled to a different one of the output conductors of the digital-to-analog converters to hold analog data transferred in parallel from the converters, the first storage elements operative for receiving discrete analog data from the second storage elements and continually shifting the analog data along the first linear array in accordance with sequences of clock pulses to provide an analog signal at the output of the first linear array, the second storage elements operative for holding the analog data transferred in parallel from the digital-to-analog converters at the end of each sequence of clock pulses.
Claim 3
Dependent Claim 69 words
The system of claim 1, further including: a plurality of buffer means one of which is coupled between each of the second storage elements and the digital-to-analog converter to which it is coupled for isolating the second storage elements from external disturbances; and amplifier means positioned at the analog output of the first linear array of first storage elements for buffering the analog signal developed at the analog output.
Claim 4
Dependent Claim 45 words
The system of claim 1, further including a plurality of correction means one of which is coupled to each of the digital-to-analog converters for adjusting the data passing through each of the converters in order to compensate for errors in the operation of the system.
Claim 5
Dependent Claim 20 words
The system of claim 1, in which the first and second storage elements are of the sample and hold type.
Claim 6
Dependent Claim 16 words
The system of claim 4, in which the first and second storage elements comprise charge-coupled devices.
Claim 7
Dependent Claim 137 words
In an apparatus including a storage device having storage elements arranged in an array of rows and columns and including a plurality of digital-to-analog converters, the process comprising the steps of: converting digital data into discrete analog data through the use of the digital-to-analog converters; providing a first set of storage elements interconnected to form a linear array having an analog output; transmitting the discrete analog data in parallel into a second set of storage elements for holding the data; periodically loading the analog data in parallel down a set of columns in the array from the second set of storage elements into the first set of storage elements; and continuously shifting the analog data across one row of the array along the first set of storage elements to provide an analog signal at the analog output.
Claim 8
Dependent Claim 137 words
In an apparatus including a storage device having storage elements arranged in an array of rows and columns and including a plurality of digital-to-analog converters, the process comprising the steps of: converting digital data into discrete analog data through the use of the digital-to-analog converters; providing a first set of storage elements interconnected to form a linear array having an analog output; transmitting the discrete analog data in parallel into a second set of storage elements for holding the data; periodically loading the analog data in parallel down a set of columns in the array from the second set of storage elements into the first set of storage elements; and continuously shifting the analog data across one row of the array along the first set of storage elements to provide an analog signal at the analog output.
Claim 9
Dependent Claim 27 words
The process of claim 6, further including the step of adjusting the analog data to compensate for errors in the steps of converting, transmitting, loading, and shifting.
Claim 10
Dependent Claim 29 words
The process of claim 6, further including the step of buffering the discrete analog data signals from the set of digital-to-analog converters to the second set of storage elements.
Claim 11
Dependent Claim 20 words
The system of claim 6, in which the first and second storage elements are of the sample and hold type.
Claim 12
Dependent Claim 16 words
The system of claim 9, in which the first and second storage elements comprise charge-coupled devices.

References Cited (Backward Citations)

US3763480A Cited
US3820112A Cited
US3958210A Cited
US4099175A Cited
US4353057A Cited
US4329679A Cited
US4458324A Cited
US4464726A Cited
US4471341A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-10-29 1994-04-30 1994-10-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-10-29 1998-04-30 1998-10-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-10-29 2002-04-30 2002-10-30 $7700.00 Window Closed / Lapsed

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