Patent US4965802A successfully refreshed from Google Patents.
US4965802A
Expired / Lapsed
US
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Memory arrangement utilized for IC card
Assignee: Maxell Ltd
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Filing: 1988-09-15
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Granted: 1990-10-23
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Expires: 2008-09-15
Abstract
Abstract An information recording medium includes a memory section for storing therein information inputted from an external apparatus, information generated internally on the basis of the inputted information, or converted information. The medium further includes a computing and processing section for performing control to write the above described information into the memory section, and a program storage section for storing therein control programs such as control program and write control program required for the computing and processing section to transfer/receive information to/from the external apparatus. A memory arrangement exists for the information recording medium wherein at least one of the plural memory sections and the program storage section comprise a fixed item information recording area. This area contains predetermined recording contents and information pieces with an error detection information piece and added per information item being stored into the fixed item information storage area. It further contains a variable item information storage area selected as occasion demands. Information with an error detection information piece is added per preset information length being stored into the variable item information storage area.
Inventors
- 👤 Tohru Shinagawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:37
CPC Classifications
G; G07; G07F; G07F7/00; G07F7/08; G07F7/10; G07F7/1008; G06; G06Q; G06Q20/00; G06Q20/30; G06Q20/34; G06Q20/341; G07F7/0806; G07F7/0833; G07F7/084
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
177 words
A memory arrangement system for a memory device to provide efficient and accurate error detection, comprising: first memory storage area, including plural memory locations, arranged in sequential intervals of constant byte length; and second memory storage area, including plural memory locations, arranged in sequential intervals of constant byte length; said first memory storage area storing a plurality of fixed information data, each of a constant byte length, and corresponding error detection data, wherein each of said fixed information data and corresponding error detection data are sequentially stored in said sequential intervals of plural memory locations; said second memory storage area storing a plurality of variable information data, each of a variable byte length, and error detection data of a constant byte length, wherein said error detection data is stored in predetermined plural memory locations of each of said sequential intervals and each of said variable information data are sequentially stored in the remaining plural memory locations of each of said sequential intervals to thereby create a memory arrangement system capable of providing efficient and accurate error detection.
Claim 2
Dependent Claim
177 words
A memory arrangement system for a memory device to provide efficient and accurate error detection, comprising: first memory storage area, including plural memory locations, arranged in sequential intervals of constant byte length; and second memory storage area, including plural memory locations, arranged in sequential intervals of constant byte length; said first memory storage area storing a plurality of fixed information data, each of a constant byte length, and corresponding error detection data, wherein each of said fixed information data and corresponding error detection data are sequentially stored in said sequential intervals of plural memory locations; said second memory storage area storing a plurality of variable information data, each of a variable byte length, and error detection data of a constant byte length, wherein said error detection data is stored in predetermined plural memory locations of each of said sequential intervals and each of said variable information data are sequentially stored in the remaining plural memory locations of each of said sequential intervals to thereby create a memory arrangement system capable of providing efficient and accurate error detection.
Claim 3
Dependent Claim
15 words
The system of claim 1, wherein said memory device is one of an IC card.
Claim 4
Dependent Claim
40 words
The system of claim 2, wherein said fixed information data includes at least one fixed information data selected from the group consisting of secret identification number, secret identification noncoincidence count number, name, address, telephone number, card classification, and issue date.
Claim 5
Dependent Claim
24 words
The system of claim 1, wherein said error detection data corresponding to each of said fixed information data is of a constant byte length.
Claim 6
Dependent Claim
27 words
The system of claim 1, wherein said constant byte length of said sequential intervals of each of said first and second storage areas is thirty-two (32) bytes.
Claim 7
Dependent Claim
36 words
The system of claim 5, wherein said error detection data of a constant byte length, stored in said second memory storage area, is stored in the last two byte memory locations of each sequential memory locations.
Claim 8
Dependent Claim
21 words
The system of claim 1, wherein said error detection data of a constant byte length equals two (2) bytes in length.
Claim 9
Dependent Claim
14 words
The system of claim 1, wherein said fixed information data are forms of identification.
Claim 10
Dependent Claim
15 words
The system of claim 1, wherein said variable information data is data comprising a program.
Claim 11
Dependent Claim
16 words
The system of claim 1, wherein said variable information data are data of a transaction history.
Claim 12
Independent Claim
213 words
A method of providing efficient and accurate error detection through arrangement of data in a memory, said method comprising the steps of: (a) storing a plurality of fixed information data, each of a constant byte length, and corresponding plural error detection data in a first memory storage area of the memory, each of said plurality of fixed information data and each corresponding error detection data being sequentially stored; (b) storing a plurality of variable information data, each of a variable byte length, and plural error detection data of a constant byte length in a second memory storage area of the memory, each of said plural error detection data of a constant byte length being stored in predetermined plural memory locations of each of a plurality of sequential intervals in said second memory storage area and each of a said plurality of variable information data being sequentially stored in remaining memory locations of each of said sequential intervals; (c) accessing the error detection data in each of the first and second storage areas of the memory; (d) detecting errors, by utilizing the accessed error detection data, corresponding to each of said fixed information data and sequential intervals of the variable information data which are in error, to thereby provide accurate and efficient error detection.
Claim 13
Independent Claim
213 words
A method of providing efficient and accurate error detection through arrangement of data in a memory, said method comprising the steps of: (a) storing a plurality of fixed information data, each of a constant byte length, and corresponding plural error detection data in a first memory storage area of the memory, each of said plurality of fixed information data and each corresponding error detection data being sequentially stored; (b) storing a plurality of variable information data, each of a variable byte length, and plural error detection data of a constant byte length in a second memory storage area of the memory, each of said plural error detection data of a constant byte length being stored in predetermined plural memory locations of each of a plurality of sequential intervals in said second memory storage area and each of a said plurality of variable information data being sequentially stored in remaining memory locations of each of said sequential intervals; (c) accessing the error detection data in each of the first and second storage areas of the memory; (d) detecting errors, by utilizing the accessed error detection data, corresponding to each of said fixed information data and sequential intervals of the variable information data which are in error, to thereby provide accurate and efficient error detection.
Claim 14
Dependent Claim
17 words
The method of claim 11, wherein said method is utilized in a memory of an IC card.
Claim 15
Dependent Claim
40 words
The method of claim 12, wherein said fixed information data includes at least one fixed information data selected from the group consisting of secret identification number, secret identification noncoincidence count number, name, address, telephone number, card classification, and issue date.
Claim 16
Dependent Claim
24 words
The method of claim 11, wherein said error detection data corresponding to each of said fixed information date is of a constant byte length.
Claim 17
Dependent Claim
27 words
The method of claim 11, wherein said constant byte length of said sequential intervals of each of said first and second storage areas is thirty-two (32) bytes.
Claim 18
Dependent Claim
36 words
The method of claim 15, wherein said error detection data of a constant byte length, stored in said second memory storage area, is stored in the last two byte memory locations of each sequential memory locations.
Claim 19
Dependent Claim
21 words
The method of claim 11, wherein said error detection data of a constant byte length equals two (2) bytes in length.
Claim 20
Dependent Claim
15 words
The method of claim 11, wherein said fixed information data area are forms of identification.
Claim 21
Dependent Claim
14 words
The method of claim 11, wherein said variable information data is comprising a program.
Claim 22
Dependent Claim
16 words
The method of claim 11, wherein said variable information data are data of a transaction history.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
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| 7.5 Years (Year 8) | 1997-10-22 | 1998-04-23 | 1998-10-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-10-22 | 2002-04-23 | 2002-10-23 | $7700.00 | Window Closed / Lapsed |