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US4965696A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage doubling driving circuit for controlling a field effect transistor having a source load

Assignee: Siemens AG
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Filing: 1989-10-23
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Granted: 1990-10-23
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Expires: 2009-10-23
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Abstract

Abstract An output stage having a load is connected to a voltage source via a source-drain path of a field effect transistor. Between drain and gate terminals of the field effect transistor a specifically designed voltage doubling circuit is provided. This has the effect that only one control voltage and one switch (control transistor T1) is required for driving the field effect transistor.

Inventors

  • 👤 Hans-Georg Kumpfmueller
  • 👤 Joachim Schaefer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 16:29
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/06; H03K17/063; H03K17/51; H03K17/56; H03K17/687; H03K17/6877

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 128 words
An output stage, comprising: a voltage source providing an operating voltage with respect to a reference potential; a series circuit connected between the operating voltage and the reference potential comprising a source-drain path of a field effect transistor and a load; an electronic switch having a control input, said electronic switch being connected between a gate of the field effect transistor and the reference potential; and a voltage doubling circuit comprising a series connection of a first diode, a capacitor, and a second diode between the operating voltage and said switch, and wherein a first resistor is connected in parallel to the series connection of the second diode and capacitor, and a second resistor is connected in parallel to the series connection of the capacitor and first diode.
Claim 2
Dependent Claim 128 words
An output stage, comprising: a voltage source providing an operating voltage with respect to a reference potential; a series circuit connected between the operating voltage and the reference potential comprising a source-drain path of a field effect transistor and a load; an electronic switch having a control input, said electronic switch being connected between a gate of the field effect transistor and the reference potential; and a voltage doubling circuit comprising a series connection of a first diode, a capacitor, and a second diode between the operating voltage and said switch, and wherein a first resistor is connected in parallel to the series connection of the second diode and capacitor, and a second resistor is connected in parallel to the series connection of the capacitor and first diode.
Claim 3
Dependent Claim 26 words
An output stage according to claim 1 wherein the first and second diodes are arranged in a conducting direction from the operating voltage to the switch.
Claim 4
Dependent Claim 63 words
An output stage according to claim 1 wherein a control voltage is connected to said control input which comprises a voltage which, in a quiescent condition of the output stage, is at a first logic level, and when current is to flow through the load, the control voltage comprises a clock voltage changing between the first logic level and a second logic level.
Claim 5
Dependent Claim 17 words
An output stage according to claim 1 wherein a diode is connected in parallel to the load.
Claim 6
Dependent Claim 13 words
An output stage according to claim 1 wherein the load comprises an inductance.
Claim 7
Dependent Claim 16 words
An output stage according to claim 5 wherein the load is a coil of a relay.
Claim 8
Dependent Claim 39 words
An output stage according to claim 1 wherein the switch comprises a transistor whose emitter is connected to the reference potential, whose collector connects to the gate of the field effect transistor, and whose base comprises said control input.

References Cited (Backward Citations)

US3866060A Cited
US4420700A Cited
US4599555A Cited
EP0229482A2 Cited
US4737667A Cited
EP0236967B1 Cited
US4796174A Cited
US4733159A Cited
JPS63182913A Cited
JPS641323A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-10-22 1994-04-23 1994-10-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-10-22 1998-04-23 1998-10-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-10-22 2002-04-23 2002-10-23 $7700.00 Window Closed / Lapsed

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