Method for producing amorphous silicon thin film transistor array substrate

Claim 1

In a method for producing an amorphous silicon thin film transistor array substrate comprising successively coating a gate insulating layer, an amorphous silicon layer and a protective insulating layer on a glass substrate provided with a gate electrode and a gate wiring having a predetermined shape, in such a manner as to not cover the terminal region at the end of the gate wiring, said terminal being used for connecting the array to an external circuit, patterning said protective insulating layer into a predetermined shape, and then after passing through a predetermined production process including etching, providing at least an amorphous silicon thin film transistor array, a gate wiring and source wiring, the improvement comprising covering said terminal region at the end of said gate wiring and exposed regions of said glass substrate with a photoresist during said step of patterning said protective insulating layer, and maintaining said photoresist on said terminal region of said gate wiring and exposed regions of said glass substrate during said etching to protect said terminal region at the end of said gate wiring and said exposed region of said glass substrate.