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US4959700A
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Insulated gate field effect transistor and its manufacturing method
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1988-02-03
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Granted: 1990-09-25
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Expires: 2008-02-03
Abstract
Abstract An insulated gate filed effect transistor comprises a non-single-crystalline semiconductor layer formed on a substrate, a gate electrode is formed on a portion of the surface of said semiconductor layer, and a gate insulated film is disposed between said gate electrode and said semiconductor layer. A non-single-crystalline channel region is defined within said semiconductor layer just below said gate electrode. A source region and a drain region are transformed from and defined within said semiconductor layer immediately adjacent to said channel region in an opposed relation, said source and drain regions being crystallized to a higher degree than that of said channel region by selectively irradiating portions of said semiconductor layer using said gate electrode as a mask.
Inventors
- 👤 Shunpei Yamazaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 18:35
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/673; H10D30/6731; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2921; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3238; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P14/38; H10P14/3802; H10P34/00; H10P34/40; H10P34/42; Y; Y10; Y10S; Y10S257/00; Y10S257/914
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
115 words
An insulated gate field effect transistor comprising: a non-single-crystalline semiconductor layer formed on a substrate; a gate electrode formed on a portion of the surface of said semiconductor layer; a gate insulated film disposed between said gate electrode and said semiconductor layer; a non-single-crystalline channel region defined within said semiconductor layer just below said gate electrode; a source region and a drain region which are transformed from and defined within said semiconductor layer immediately adjacent to said channel region in an opposed relation, said source and drain regions being crystallized to a higher degree than that of said channel region by selectively irradiating portions of said semiconductor layer using said gate electrode as a mask.
Claim 2
Dependent Claim
115 words
An insulated gate field effect transistor comprising: a non-single-crystalline semiconductor layer formed on a substrate; a gate electrode formed on a portion of the surface of said semiconductor layer; a gate insulated film disposed between said gate electrode and said semiconductor layer; a non-single-crystalline channel region defined within said semiconductor layer just below said gate electrode; a source region and a drain region which are transformed from and defined within said semiconductor layer immediately adjacent to said channel region in an opposed relation, said source and drain regions being crystallized to a higher degree than that of said channel region by selectively irradiating portions of said semiconductor layer using said gate electrode as a mask.
Claim 3
Dependent Claim
26 words
An insulated gate field effect transistor according to claim 1 wherein the source and drain regions are each formed vertically extending toward but not to substrate.
Claim 4
Dependent Claim
24 words
An insulated gate field effect transistor according to claim 1 wherein the source and drain regions are each formed extending vertically to the substrate.
Claim 5
Dependent Claim
107 words
An insulated gate field effect transistor comprising: a non-single-crystalline semiconductor layer formed on a substrate; a gate electrode formed on a portion of the surface of said semiconductor layer; a gate insulated film disposed between said gate electrode and said semiconductor layer; a non-single-crystalline channel region defined within said semiconductor layer just below said gate electrode; a source region and a drain region which are defined within said semiconductor layer immediately adjacent to said channel region, said source and drain regions being formed by selectively irradiating and crystallizing portions of said semiconductor layer with said gate electrode as a mask which prevents said channel region from crystallization.
Claim 6
Dependent Claim
107 words
An insulated gate field effect transistor comprising: a non-single-crystalline semiconductor layer formed on a substrate; a gate electrode formed on a portion of the surface of said semiconductor layer; a gate insulated film disposed between said gate electrode and said semiconductor layer; a non-single-crystalline channel region defined within said semiconductor layer just below said gate electrode; a source region and a drain region which are defined within said semiconductor layer immediately adjacent to said channel region, said source and drain regions being formed by selectively irradiating and crystallizing portions of said semiconductor layer with said gate electrode as a mask which prevents said channel region from crystallization.
Claim 7
Dependent Claim
90 words
An insulated gate field effect transistor comprising a drain region, a source region and a channel region formed on or within a substrate, said transistor characterized in that said three regions are formed within an amorphous semiconductor region or a microcrystalline semiconductor region, and that, out of said drain, source and channel regions, only said drain region and said source region are recrystallized by irradiating said semiconductor region with a laser beam through a mask overlaid on said channel region, so that said channel region remains substantially amorphous or microcrystalline.
Claim 8
Dependent Claim
90 words
An insulated gate field effect transistor comprising a drain region, a source region and a channel region formed on or within a substrate, said transistor characterized in that said three regions are formed within an amorphous semiconductor region or a microcrystalline semiconductor region, and that, out of said drain, source and channel regions, only said drain region and said source region are recrystallized by irradiating said semiconductor region with a laser beam through a mask overlaid on said channel region, so that said channel region remains substantially amorphous or microcrystalline.
Claim 9
Dependent Claim
27 words
An insulated gate field effect transistor according to claim 4 wherein the source and drain regions are each formed vertically extending toward but not to the substrate.
Claim 10
Dependent Claim
24 words
An insultated gate field effect transistor according to claim 4 wherein the source and drain regions are each formed extending vertically to the substrate.
Claim 11
Dependent Claim
27 words
An insulated gate field effect transistor according to claim 5 wherein the source and drain regions are each formed vertically extending toward but not to the substrate.
Claim 12
Dependent Claim
24 words
An insulated gate field effect transistor according to claim 5 wherein the source and drain regions are each formed extending vertically to the substrate.
References Cited (Backward Citations)
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