Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
67 words
A process for reducing the electric field effect in the bird's beak region of a DRAM cell following expansion of the cell's active area, which had previously been implanted with arsenic to create N+ regions, through local encroachment reduction, said process comprising the step of blanket implanting the active are with phosphorus to create N- regions between the N+ regions and the edge of the field oxide.
Claim 2
Dependent Claim
67 words
A process for reducing the electric field effect in the bird's beak region of a DRAM cell following expansion of the cell's active area, which had previously been implanted with arsenic to create N+ regions, through local encroachment reduction, said process comprising the step of blanket implanting the active are with phosphorus to create N- regions between the N+ regions and the edge of the field oxide.
Claim 3
Dependent Claim
23 words
The process of claim 1 wherein said implanting with phosphorus is performed with a phosphorus concentration of 1E12 to 1E13 per centimeter squared.
Claim 4
Dependent Claim
21 words
The process of claim 2 wherein said implanting with phosphorus is performed within an energy range of 50 to 100 kev.
Claim 5
Dependent Claim
178 words
A process for creating a graded N-P junction within a DRAM cell, the capacitive region of which has been expanded through local encroachment reduction, said process comprising the following steps which begin subsequent to the conventional creation of field oxide regions having an underlying channel-stop implant of p-type material, creation of a gate oxide layer, creation of a transistor gate for the cell by etching a polysilicon layer, the self-aligned implant of lightly-doped (N-) source and drain regions, and creation of transistor gate sidewall spacers by anisotropically etching a spacer oxide layer, and prior to the deposition of the cell dielectric layer, said process comprising the following steps: (a) blanket implanting of arsenic in the cell active area to create an N+ region; (b) etching back field oxide regions that surround the cell active area in order to reduce the size of the bird's beak regions and expand the active area; and (c) blanket implanting of phosphorus in the cell active area to create N- regions between the N+ region and the edge of the field oxide regions.
Claim 6
Dependent Claim
178 words
A process for creating a graded N-P junction within a DRAM cell, the capacitive region of which has been expanded through local encroachment reduction, said process comprising the following steps which begin subsequent to the conventional creation of field oxide regions having an underlying channel-stop implant of p-type material, creation of a gate oxide layer, creation of a transistor gate for the cell by etching a polysilicon layer, the self-aligned implant of lightly-doped (N-) source and drain regions, and creation of transistor gate sidewall spacers by anisotropically etching a spacer oxide layer, and prior to the deposition of the cell dielectric layer, said process comprising the following steps: (a) blanket implanting of arsenic in the cell active area to create an N+ region; (b) etching back field oxide regions that surround the cell active area in order to reduce the size of the bird's beak regions and expand the active area; and (c) blanket implanting of phosphorus in the cell active area to create N- regions between the N+ region and the edge of the field oxide regions.
Claim 7
Dependent Claim
18 words
The process of claim 4 which further comprises the step of implanting boron atoms beneath the N+ region.
Claim 8
Dependent Claim
23 words
The process of claim 5 wherein said implanting with phosphorus is performed with a phosphorus concentration of 1E12 to 1E13 per centimeter squared.
Claim 9
Dependent Claim
21 words
The process of claim 6 wherein said implanting with phosphorus is performed within an energy range of 50 to 100 kev.