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US4958204A
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Junction field-effect transistor with a novel gate
Assignee: Vishay Siliconix Inc
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Filing: 1989-12-21
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Granted: 1990-09-18
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Expires: 2009-12-21
Abstract
Abstract A junction field effect transistor (JFET) with a novel gate. The novel gate uses a gate region (19) induced by charged ions (13) located in the gate dielectric layer (12) above the channel region (1). The charged ions (13) that induce the gate region are implanted into the gate dielectric layer (12) and subsequently activated. Both N channel and P channel devices can be produced in this fashion. The invention, unlike conventional JFET's, may be forward biased, and is free of the noise produced by a conventional diffused gate region.
Inventors
- 👤 Richard A. Blanchard
- 👤 Adrian I. Cogan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 20:33
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10D30/00; H10D30/80; H10D30/83; H10D64/60; H10D64/66; H10D64/68; H10D64/691
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
164 words
A junction field effect transistor comprising: a semiconductor substrate of a first conductivity type; a semiconductor region of a second conductivity type opposite the first conductivity type formed overlying the substrate and having a principal surface; a source region of the second conductivity type being more heavily doped than the semiconductor region, and formed in the semiconductor region and extending to the principal surface; a drain region of the second conductivity type being more heavily doped than the semiconductor region, and formed in the semiconductor region and extending to the principal surface; an insulating layer including charged ions therein overlying a portion of the principal surface between the source region and drain region; a first conductive gate electrode overlying the insulating layer; and a second conductive gate electrode formed on a surface of the semiconductor substrate; whereby application of a voltage to the first and second conductive gate electrode induces a depletion region in a portion of the semiconductor region underlying the insulating layer.
Claim 2
Dependent Claim
164 words
A junction field effect transistor comprising: a semiconductor substrate of a first conductivity type; a semiconductor region of a second conductivity type opposite the first conductivity type formed overlying the substrate and having a principal surface; a source region of the second conductivity type being more heavily doped than the semiconductor region, and formed in the semiconductor region and extending to the principal surface; a drain region of the second conductivity type being more heavily doped than the semiconductor region, and formed in the semiconductor region and extending to the principal surface; an insulating layer including charged ions therein overlying a portion of the principal surface between the source region and drain region; a first conductive gate electrode overlying the insulating layer; and a second conductive gate electrode formed on a surface of the semiconductor substrate; whereby application of a voltage to the first and second conductive gate electrode induces a depletion region in a portion of the semiconductor region underlying the insulating layer.
Claim 3
Dependent Claim
19 words
The device of claim 1, further comprising that said charged ions are implanted charged ions in said insulating layer.
Claim 4
Dependent Claim
18 words
The device of claim 1, further comprising that said charged ions are activated by annealing after said implantation.
Claim 5
Dependent Claim
15 words
The device of claim 1, further comprising said charged ions being charged ions of boron.
Claim 6
Dependent Claim
15 words
The device of claim 1, further comprising said charged ions being charged ions of cesium.
Claim 7
Dependent Claim
14 words
The device of claim 1, wherein said first conductivity type is positive conductivity type.
Claim 8
Dependent Claim
14 words
The device of claim 1, wherein said first conductivity type is negative conductivity type.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-09-17 | 1994-03-19 | 1994-09-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-09-17 | 1998-03-19 | 1998-09-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-09-17 | 2002-03-19 | 2002-09-18 | $7700.00 | Window Closed / Lapsed |