US4958085A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Scanning circuit outputting scanning pulse signals of two or more phases
Assignee: Canon Inc
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Filing: 1988-10-24
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Granted: 1990-09-18
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Expires: 2008-10-24
Abstract
Abstract There is disclosed a scanning circuit composed of plural stages of unit circuit for outputting scanning pulses of two or more phases in succession from the unit circuits according to multiphase driving pulses. The scanning circuit is provided with set circuits for setting the unit circuits at a predetermined state and a switch circuit for activating the set circuit of a preceding unit circuit in response to the scanning pulse. The switch circuits are activated by driving pulses different from the multiphase driving pulses.
Inventors
- 👤 Seiji Hashimoto
- 👤 Hayao Ohzu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:32
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/18; G11C19/28; G11C19/282; G11C19/285; H; H03; H03K; H03K5/00; H03K5/15; H03K5/15013; H03K5/1506; H03K5/15093
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
90 words
A scanning circuit composed of unit circuits connected in plural stages, for outputting scanning pulse signals of at least two phase in succession from said unit circuits according to first multi-phase driving pulse signals, said scanning circuit comprising: setting means for setting said unit circuits in a reset state; and switch means for activating said setting means of a preceding unit circuit by a respective one of the scanning pulse signals; wherein said switch means are operated by second driving pulse signals different from the first multi-phase driving pulse signals.
Claim 2
Dependent Claim
90 words
A scanning circuit composed of unit circuits connected in plural stages, for outputting scanning pulse signals of at least two phase in succession from said unit circuits according to first multi-phase driving pulse signals, said scanning circuit comprising: setting means for setting said unit circuits in a reset state; and switch means for activating said setting means of a preceding unit circuit by a respective one of the scanning pulse signals; wherein said switch means are operated by second driving pulse signals different from the first multi-phase driving pulse signals.
Claim 3
Dependent Claim
26 words
A scanning circuit according to claim 1, further comprising at least one line of photoelectric converting elements arranged to be scanned by said scanning pulse signals.
Claim 4
Dependent Claim
101 words
A scanning circuit for outputting scanning pulse signals in succession from unit circuits of plural stages by driving said unit circuits alternately with two-phase driving pulse signals in response to a start pulse, wherein each of said unit circuits comprises a drive circuit for outputting one of the two-phase driving pulse signals as a scanning pulse signals, wherein a resetting circuit is connected to a control terminal of said drive circuit, and wherein said resetting circuit is controlled by one of the two-phase driving pulse signals supplied to a next stage drive circuit to effect resetting control of said drive circuit.
Claim 5
Dependent Claim
101 words
A scanning circuit for outputting scanning pulse signals in succession from unit circuits of plural stages by driving said unit circuits alternately with two-phase driving pulse signals in response to a start pulse, wherein each of said unit circuits comprises a drive circuit for outputting one of the two-phase driving pulse signals as a scanning pulse signals, wherein a resetting circuit is connected to a control terminal of said drive circuit, and wherein said resetting circuit is controlled by one of the two-phase driving pulse signals supplied to a next stage drive circuit to effect resetting control of said drive circuit.
Claim 6
Dependent Claim
71 words
A scanning circuit according to claim 3, wherein said resetting circuit is composed of a serial circuit of a first normally-off transistor and a second normally-on transistor, in which said first transistor is controlled by one of the two-phase driving pulse signals supplied to said next stage while said second transistor is controlled by the start pulse signal or a scanning pulse output from said drive circuit of a preceding stage.
Claim 7
Dependent Claim
26 words
A scanning circuit according to claim 3, further comprising at least one line of photoelectric converting elements arranged to be scanned by said scanning pulse signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-09-17 | 1994-03-19 | 1994-09-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-09-17 | 1998-03-19 | 1998-09-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-09-17 | 2002-03-19 | 2002-09-18 | $7700.00 | Window Closed / Lapsed |