US4956798A — Arbitrary waveform generator with adjustable spac…

Claim 1

Independent Claim 133 words

An arbitrary waveform generator of the type having waveform segments stored in a memory and having a desired waveform represented by a plurality of packet data words, each packet data word having a plurality of elements, comprising: means for storing each element, one element being a clock control word; means for generating a sequence of addresses for the memory to access a particular waveform segment determined by each packet data word according to the elements in the storing means, the rate at which the sequence of addresses is generated being determined by a clock signal; and means for varying a clock frequency for each packet data word according to the clock control word to produce the clock signal so that the duration of each waveform segment is adjusted to produce the desired waveform.

Claim 2

Dependent Claim 133 words

An arbitrary waveform generator of the type having waveform segments stored in a memory and having a desired waveform represented by a plurality of packet data words, each packet data word having a plurality of elements, comprising: means for storing each element, one element being a clock control word; means for generating a sequence of addresses for the memory to access a particular waveform segment determined by each packet data word according to the elements in the storing means, the rate at which the sequence of addresses is generated being determined by a clock signal; and means for varying a clock frequency for each packet data word according to the clock control word to produce the clock signal so that the duration of each waveform segment is adjusted to produce the desired waveform.

Claim 3

Dependent Claim 47 words

An arbitrary waveform generator as recited in claim 1 wherein the storing means comprises a plurality of storage devices, at least one for each element, having a common address bus and a common data bus, the common data bus coupling the storage devices to the generating means.

Claim 4

Dependent Claim 108 words

An arbitrary waveform generator as recited in claim 2 wherein the generating means comprises means coupled to the common data bus for incrementing a start address, a length value and a segment repetition value transferred from the respective storage devices, the start address and length value incrementing means being incremented by the clock signal and the segment repetition value incrementing means being incremented by a length overflow signal from the length value incrementing means, the length overflow signal also initializing the start address and length value incrementing means to the start address and length value until the segment repetition value incrementing means produces a packet complete overflow signal.

Claim 5

Dependent Claim 51 words

An arbitrary waveform generator as recited in claim 1 wherein the varying means comprises a variable clock having a master clock and the clock control word from the storing means as inputs and having the clock signal as an output, the clock signal being a function of the clock control word.

Claim 6

Dependent Claim 37 words

An arbitrary waveform generator as recited in claim 1 further comprising means for sequencing through the packet data words to generate a desired waveform as a sequence of the desired waveform segments from the packet data words.

Claim 7

Dependent Claim 28 words

An arbitrary waveform generator as recited in claim 5 further comprising means for repeating the desired waveform for a predetermined number of iterations to produce a test waveform.

Claim 8

Dependent Claim 67 words

An arbitrary waveform generator as recited in claim 6 wherein the storing means comprises a plurality of addressable storage devices coupled to a packet address bus and to a packet data bus, elements of the packet data words being stored separately each in at least one of the addressable storage devices, the packet data bus coupling the storage devices to the clock signal and addresses generating means.

Claim 9

Dependent Claim 40 words

An arbitrary waveform generator as recited in claim 7 wherein the clock signal generating means comprises a variable clock having as inputs a master clock signal and the clock control word from the storing means to produce the clock signal.

Claim 10

Dependent Claim 67 words

An arbitrary waveform generator as recited in claim 8 wherein the address generating means comprises: means for sequencing addresses in response to the clock signal starting from a memory start address from the storing means; and means for indicating when a waveform segment for the packet data word is complete according to a memory end address determined by a data point length value from the storing means.

Claim 11

Dependent Claim 58 words

An arbitrary waveform generator as recited in claim 9 wherein the address generating means further comprises means for repeating the waveform segment by reinitializing the sequencing and indicating means to the memory start address and the data point length value, respectively, to repeat the addresses generated by the addresses generating means until the desired waveform segment is produced.

Claim 12

Dependent Claim 88 words

An arbitrary waveform generator as recited in claim 10 wherein the packet data word sequencing means comprises: means coupled to the packet address bus for providing a packet data word address to the storing means; means coupled to the providing means for initializing the providing means with a start packet data word address as the packet data word address; and means for stepping the packet data word address to a next packet data word address after each desired waveform segment is complete until the desired waveform is complete.

Claim 13

Dependent Claim 48 words

An arbitrary waveform generator as recited in claim 11 wherein the desired waveform repeating means comprises: means for counting the number of desired waveforms completed; and means for indicating that the test waveform is complete when a predetermined number of desired waveforms are counted by the counting means.

Claim 14

Dependent Claim 103 words

An arbitrary waveform generator of the type having waveform segments stored in a memory as sequences of data points, and having desired waveforms defined by sequences of packet data words, comprising: means for storing the packet data words, an element of each packet data word being a clock control word; means for generating a clock signal for each packet data word that has a frequency determined by the clock control word for that packet data word; and means for generating addresses for the memory to generate a desired waveform segment from each packet data word at a rate determined by the clock signal.

Claim 15

Dependent Claim 103 words

An arbitrary waveform generator of the type having waveform segments stored in a memory as sequences of data points, and having desired waveforms defined by sequences of packet data words, comprising: means for storing the packet data words, an element of each packet data word being a clock control word; means for generating a clock signal for each packet data word that has a frequency determined by the clock control word for that packet data word; and means for generating addresses for the memory to generate a desired waveform segment from each packet data word at a rate determined by the clock signal.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1993-09-10	1994-03-12	1994-09-11	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1997-09-10	1998-03-12	1998-09-11	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2001-09-10	2002-03-12	2002-09-11	$7700.00	Window Closed / Lapsed

Arbitrary waveform generator with adjustable spacing

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